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Message-ID: <CAMzpN2j5wBdSiHt=3wiE7X4GY3+B6-RUE1ZaJw2VjHcJN+kGwA@mail.gmail.com>
Date: Wed, 10 Jan 2018 22:35:58 -0500
From: Brian Gerst <brgerst@...il.com>
To: Andi Kleen <andi@...stfloor.org>
Cc: Thomas Gleixner <tglx@...utronix.de>,
"the arch/x86 maintainers" <x86@...nel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
David Woodhouse <dwmw@...zon.co.uk>,
Paul Turner <pjt@...gle.com>,
Andy Lutomirski <luto@...nel.org>,
Peter Zijlstra <peterz@...radead.org>,
Tom Lendacky <thomas.lendacky@....com>,
Tim Chen <tim.c.chen@...ux.intel.com>,
Greg Kroah-Hartman <gregkh@...ux-foundation.org>,
Dave Hansen <dave.hansen@...el.com>,
Jiri Kosina <jikos@...nel.org>, Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH v1 3/8] x86/entry/clearregs: Clear registers for 64bit SYSCALL
On Tue, Jan 9, 2018 at 8:03 PM, Andi Kleen <andi@...stfloor.org> wrote:
> From: Andi Kleen <ak@...ux.intel.com>
>
> We clear all the non argument registers for 64bit SYSCALLs
> to minimize any risk of bad speculation using user values.
>
> So far unused argument registers still leak. To be addressed
> in future patches.
>
> Signed-off-by: Andi Kleen <ak@...ux.intel.com>
> ---
> arch/x86/entry/entry_64.S | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
> index bbdfbdd817d6..632081fd7086 100644
> --- a/arch/x86/entry/entry_64.S
> +++ b/arch/x86/entry/entry_64.S
> @@ -236,6 +236,14 @@ GLOBAL(entry_SYSCALL_64_after_hwframe)
> pushq %r11 /* pt_regs->r11 */
> sub $(6*8), %rsp
> SAVE_EXTRA_REGS
> + /* Sanitize registers against speculation attacks */
> + /* r10 is cleared later, arguments are handled in san_args* */
> + CLEAR_R11_TO_R15
Don't need to explicitly clear R11 here. It is clobbered with current_task.
> +#ifndef CONFIG_FRAME_POINTER
> + xor %ebp, %ebp
> +#endif
> + xor %ebx, %ebx
> + xor %ecx, %ecx
>
> UNWIND_HINT_REGS extra=0
>
> @@ -263,6 +271,7 @@ entry_SYSCALL_64_fastpath:
> #endif
> ja 1f /* return -ENOSYS (already in pt_regs->ax) */
> movq %r10, %rcx
> + xor %r10, %r10
RCX is already clear, so xchgq %r10, %rcx will be simpler.
--
Brian Gerst
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