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Message-ID: <20180111184750.y42sv4hn7e3r3f3k@two.firstfloor.org>
Date: Thu, 11 Jan 2018 10:47:50 -0800
From: Andi Kleen <andi@...stfloor.org>
To: Brian Gerst <brgerst@...il.com>
Cc: Andi Kleen <andi@...stfloor.org>,
Thomas Gleixner <tglx@...utronix.de>,
the arch/x86 maintainers <x86@...nel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
David Woodhouse <dwmw@...zon.co.uk>,
Paul Turner <pjt@...gle.com>,
Andy Lutomirski <luto@...nel.org>,
Peter Zijlstra <peterz@...radead.org>,
Tom Lendacky <thomas.lendacky@....com>,
Tim Chen <tim.c.chen@...ux.intel.com>,
Greg Kroah-Hartman <gregkh@...ux-foundation.org>,
Dave Hansen <dave.hansen@...el.com>,
Jiri Kosina <jikos@...nel.org>, Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH v1 3/8] x86/entry/clearregs: Clear registers for 64bit
SYSCALL
On Wed, Jan 10, 2018 at 10:35:58PM -0500, Brian Gerst wrote:
> > @@ -263,6 +271,7 @@ entry_SYSCALL_64_fastpath:
> > #endif
> > ja 1f /* return -ENOSYS (already in pt_regs->ax) */
> > movq %r10, %rcx
> > + xor %r10, %r10
>
> RCX is already clear, so xchgq %r10, %rcx will be simpler.
XOR is special cased by the hardware, so it's always more
efficient.
-Andi
>
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