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Message-ID: <CACxGe6uJNEeDno4w84fCXQ103dKKysy+dyEvV2=QrL5YHNrEtQ@mail.gmail.com>
Date: Thu, 11 Jan 2018 19:56:01 +0000
From: Grant Likely <grant.likely@...retlab.ca>
To: Timur Tabi <timur@...eaurora.org>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Stephen Boyd <sboyd@...eaurora.org>,
Rob Herring <robh+dt@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
linux-arm-msm@...r.kernel.org,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
linux-gpio@...r.kernel.org,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>
Subject: Re: [PATCH 2/3] dt-bindings: pinctrl: Add a ngpios-ranges property
On Thu, Jan 11, 2018 at 4:36 PM, Timur Tabi <timur@...eaurora.org> wrote:
> On 01/11/2018 10:33 AM, Grant Likely wrote:
>>
>> What level of access control is implemented here? Is there access
>> control for each GPIO individually, or is it done by banks of GPIOs?
>> Just asking to make sure I understand the problem domain.
>
>
> On our ACPI system, it's specific GPIOs. Each GPIO is in its own 64k page,
> which is what allows us to block specific ones.
Okay, thanks.
g.
>
> --
> Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm
> Technologies, Inc. Qualcomm Technologies, Inc. is a member of the
> Code Aurora Forum, a Linux Foundation Collaborative Project.
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