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Message-ID: <bb8dcd84-568b-ad74-92c2-646f0d5188a6@intel.com>
Date: Thu, 11 Jan 2018 17:58:11 -0800
From: Dave Hansen <dave.hansen@...el.com>
To: Ashok Raj <ashok.raj@...el.com>, linux-kernel@...r.kernel.org,
Thomas Gleixner <tglx@...utronix.de>,
Tim Chen <tim.c.chen@...ux.intel.com>,
Andy Lutomirski <luto@...nel.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Greg KH <gregkh@...uxfoundation.org>
Cc: Andrea Arcangeli <aarcange@...hat.com>,
Andi Kleen <ak@...ux.intel.com>,
Arjan Van De Ven <arjan.van.de.ven@...el.com>,
David Woodhouse <dwmw@...zon.co.uk>,
Peter Zijlstra <peterz@...radead.org>,
Dan Williams <dan.j.williams@...el.com>,
Paolo Bonzini <pbonzini@...hat.com>,
Jun Nakajima <jun.nakajima@...el.com>,
Asit Mallick <asit.k.mallick@...el.com>
Subject: Re: [PATCH 3/5] x86/ibrs: Add direct access support for
MSR_IA32_SPEC_CTRL
On 01/11/2018 05:32 PM, Ashok Raj wrote:
> +static void save_guest_spec_ctrl(struct vcpu_vmx *vmx)
> +{
> + if (boot_cpu_has(X86_FEATURE_SPEC_CTRL)) {
> + vmx->spec_ctrl = spec_ctrl_get();
> + spec_ctrl_restriction_on();
> + } else
> + rmb();
> +}
Does this need to be "ifence()"? Better yet, do we just need to create
a helper for boot_cpu_has(X86_FEATURE_SPEC_CTRL) that does the barrier?
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