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Date: Fri, 12 Jan 2018 16:22:53 +0200
From: Claudiu Beznea <claudiu.beznea@...rochip.com>
To: <thierry.reding@...il.com>, <robh+dt@...nel.org>,
<mark.rutland@....com>, <linux@...linux.org.uk>,
<daniel@...que.org>, <haojian.zhuang@...il.com>,
<robert.jarzmik@...e.fr>, <corbet@....net>,
<nicolas.ferre@...rochip.com>,
<alexandre.belloni@...e-electrons.com>
CC: <linux-pwm@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-amlogic@...ts.infradead.org>,
<linux-rockchip@...ts.infradead.org>,
<linux-rpi-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>,
Claudiu Beznea <claudiu.beznea@...rochip.com>
Subject: [PATCH v2 06/16] ARM: dts: pxa: update pwm-cells
Update pwm-cells to 2 to allow initialization of channel number an period.
Signed-off-by: Claudiu Beznea <claudiu.beznea@...rochip.com>
---
arch/arm/boot/dts/pxa25x.dtsi | 4 ++--
arch/arm/boot/dts/pxa27x.dtsi | 8 ++++----
arch/arm/boot/dts/pxa3xx.dtsi | 8 ++++----
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/boot/dts/pxa25x.dtsi b/arch/arm/boot/dts/pxa25x.dtsi
index 95d59be97213..8c55b3552c42 100644
--- a/arch/arm/boot/dts/pxa25x.dtsi
+++ b/arch/arm/boot/dts/pxa25x.dtsi
@@ -70,14 +70,14 @@
pwm0: pwm@...00000 {
compatible = "marvell,pxa250-pwm";
reg = <0x40b00000 0x10>;
- #pwm-cells = <1>;
+ #pwm-cells = <2>;
clocks = <&clks CLK_PWM0>;
};
pwm1: pwm@...00010 {
compatible = "marvell,pxa250-pwm";
reg = <0x40b00010 0x10>;
- #pwm-cells = <1>;
+ #pwm-cells = <2>;
clocks = <&clks CLK_PWM1>;
};
};
diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi
index 747f750f675d..e3db171cfeb1 100644
--- a/arch/arm/boot/dts/pxa27x.dtsi
+++ b/arch/arm/boot/dts/pxa27x.dtsi
@@ -46,28 +46,28 @@
pwm0: pwm@...00000 {
compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
reg = <0x40b00000 0x10>;
- #pwm-cells = <1>;
+ #pwm-cells = <2>;
clocks = <&clks CLK_PWM0>;
};
pwm1: pwm@...00010 {
compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
reg = <0x40b00010 0x10>;
- #pwm-cells = <1>;
+ #pwm-cells = <2>;
clocks = <&clks CLK_PWM1>;
};
pwm2: pwm@...00000 {
compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
reg = <0x40c00000 0x10>;
- #pwm-cells = <1>;
+ #pwm-cells = <2>;
clocks = <&clks CLK_PWM0>;
};
pwm3: pwm@...00010 {
compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
reg = <0x40c00010 0x10>;
- #pwm-cells = <1>;
+ #pwm-cells = <2>;
clocks = <&clks CLK_PWM1>;
};
diff --git a/arch/arm/boot/dts/pxa3xx.dtsi b/arch/arm/boot/dts/pxa3xx.dtsi
index 55c75b67351c..1f37295b05a3 100644
--- a/arch/arm/boot/dts/pxa3xx.dtsi
+++ b/arch/arm/boot/dts/pxa3xx.dtsi
@@ -200,7 +200,7 @@
pwm0: pwm@...00000 {
compatible = "marvell,pxa270-pwm";
reg = <0x40b00000 0x10>;
- #pwm-cells = <1>;
+ #pwm-cells = <2>;
clocks = <&clks CLK_PWM0>;
status = "disabled";
};
@@ -208,7 +208,7 @@
pwm1: pwm@...00010 {
compatible = "marvell,pxa270-pwm";
reg = <0x40b00010 0x10>;
- #pwm-cells = <1>;
+ #pwm-cells = <2>;
clocks = <&clks CLK_PWM1>;
status = "disabled";
};
@@ -216,7 +216,7 @@
pwm2: pwm@...00000 {
compatible = "marvell,pxa270-pwm";
reg = <0x40c00000 0x10>;
- #pwm-cells = <1>;
+ #pwm-cells = <2>;
clocks = <&clks CLK_PWM0>;
status = "disabled";
};
@@ -224,7 +224,7 @@
pwm3: pwm@...00010 {
compatible = "marvell,pxa270-pwm";
reg = <0x40c00010 0x10>;
- #pwm-cells = <1>;
+ #pwm-cells = <2>;
clocks = <&clks CLK_PWM1>;
status = "disabled";
};
--
2.7.4
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