linux-kernel - Re: [PATCH v2] x86/retpoline: Add LFENCE to the retpoline/RSB filling RSB macros

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Message-ID: <1515949719.22147.42.camel@amazon.co.uk>
Date:   Sun, 14 Jan 2018 18:08:39 +0100
From:   "Woodhouse, David" <dwmw@...zon.co.uk>
To:     Borislav Petkov <bp@...en8.de>,
        Tom Lendacky <thomas.lendacky@....com>
CC:     <x86@...nel.org>, <linux-kernel@...r.kernel.org>,
        Rik van Riel <riel@...hat.com>,
        Andi Kleen <ak@...ux.intel.com>,
        Josh Poimboeuf <jpoimboe@...hat.com>,
        Peter Zijlstra <peterz@...radead.org>,
        "Linus Torvalds" <torvalds@...ux-foundation.org>,
        Jiri Kosina <jikos@...nel.org>,
        Dan Williams <dan.j.williams@...el.com>,
        Dave Hansen <dave.hansen@...el.com>,
        Andy Lutomirski <luto@...nel.org>,
        Kees Cook <keescook@...gle.com>,
        "Thomas Gleixner" <tglx@...utronix.de>,
        Tim Chen <tim.c.chen@...ux.intel.com>,
        "Greg Kroah-Hartman" <gregkh@...ux-foundation.org>,
        Paul Turner <pjt@...gle.com>
Subject: Re: [PATCH v2] x86/retpoline: Add LFENCE to the retpoline/RSB
 filling RSB macros

On Sun, 2018-01-14 at 16:41 +0100, Borislav Petkov wrote:
> On Sat, Jan 13, 2018 at 05:27:30PM -0600, Tom Lendacky wrote:
> > 
> > The PAUSE instruction is currently used in the retpoline and RSB filling
> > macros as a speculation trap.  The use of PAUSE was originally suggested
> > because it showed a very, very small difference in the amount of
> > cycles/time used to execute the retpoline as compared to LFENCE.  On AMD,
> > the PAUSE instruction is not a serializing instruction, so the pause/jmp
> > loop will use excess power as it is speculated over waiting for return
> > to mispredict to the correct target.
> > 
> > The RSB filling macro is applicable to AMD, and, if software is unable to
> > verify that LFENCE is serializing on AMD (possible when running under a
> > hypervisor), the generic retpoline support will be used and, so, is also
> > applicable to AMD.  Keep the current usage of PAUSE for Intel, but add an
> > LFENCE instruction to the speculation trap for AMD.
> > 
> > Signed-off-by: Tom Lendacky <thomas.lendacky@....com>
> > ---
> >  arch/x86/include/asm/nospec-branch.h |    6 +++++-
> >  1 file changed, 5 insertions(+), 1 deletion(-)
>
> Reviewed-by: Borislav Petkov <bp@...e.de>

Acked-by: Arjan van de Ven <arjan@...ux.intel.com>
Acked-by: David Woodhouse <dwmw@...zon.co.uk>
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