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Message-ID: <445ec6c6-a835-fbdc-dca3-222a73d19816@citrix.com>
Date: Mon, 15 Jan 2018 17:38:01 +0000
From: Andrew Cooper <andrew.cooper3@...rix.com>
To: Andy Lutomirski <luto@...capital.net>,
Jon Masters <jcm@...masters.org>
CC: Henrique de Moraes Holschuh <hmh@....eng.br>,
Andi Kleen <andi@...stfloor.org>,
David Woodhouse <dwmw2@...radead.org>, <tglx@...utronix.de>,
<x86@...nel.org>, <linux-kernel@...r.kernel.org>, <pjt@...gle.com>,
<torvalds@...ux-foundation.org>, <gregkh@...ux-foundation.org>,
<peterz@...radead.org>, <thomas.lendacky@....com>,
<arjan.van.de.ven@...el.com>
Subject: Re: Improve retpoline for Skylake
On 15/01/18 16:57, Andy Lutomirski wrote:
>
>> On Jan 15, 2018, at 12:26 AM, Jon Masters <jcm@...masters.org> wrote:
>>
>>> On 01/12/2018 05:03 PM, Henrique de Moraes Holschuh wrote:
>>> On Fri, 12 Jan 2018, Andi Kleen wrote:
>>>>> Skylake still loses if it takes an SMI, right?
>>>> SMMs are usually rare, especially on servers, and are usually
>>>> not very predictible, and even if you have
>>> FWIW, a data point: SMIs can be generated on demand by userspace on
>>> thinkpad laptops, but they will be triggered from within a kernel
>>> context. I very much doubt this is a rare pattern...
>> Sure. Just touch some "legacy" hardware that the vendor emulates in a
>> nasty SMI handler. It's definitely not acceptable to assume that SMIs
>> can't be generated under the control of some malicious user code.
>>
>> Our numbers on Skylake weren't bad, and there seem to be all kinds of
>> corner cases, so again, it seems as if IBRS is the safest choice.
>>
> And keep in mind that SMIs generally hit all CPUs at once, making them extra nasty.
>
> Can we get firmware vendors to refill the return buffer just before RSM?
Refill or not, you are aware that a correctly timed SMI in a leaf
function will cause the next ret to speculate into userspace, because
there is guaranteed peturbance in the RSB? (On the expectation that the
SMM handler isn't entirely devoid of function calls).
Having firmware refill the RSB only makes a difference if you are on
Skylake+ were RSB underflows are bad, and you're not using IBRS to
protect your indirect predictions.
~Andrew
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