linux-kernel - Re: [tip:x86/pti] x86/retpoline: Fill RSB on context switch for affected CPUs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <1516027166.22147.183.camel@infradead.org>
Date:   Mon, 15 Jan 2018 15:39:26 +0100
From:   David Woodhouse <dwmw2@...radead.org>
To:     David Laight <David.Laight@...LAB.COM>,
        "riel@...hat.com" <riel@...hat.com>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "tim.c.chen@...ux.intel.com" <tim.c.chen@...ux.intel.com>,
        "pjt@...gle.com" <pjt@...gle.com>,
        "jpoimboe@...hat.com" <jpoimboe@...hat.com>,
        "ak@...ux.intel.com" <ak@...ux.intel.com>,
        "gregkh@...ux-foundation.org" <gregkh@...ux-foundation.org>,
        "torvalds@...ux-foundation.org" <torvalds@...ux-foundation.org>,
        "dave.hansen@...el.com" <dave.hansen@...el.com>,
        "luto@...capital.net" <luto@...capital.net>,
        "jikos@...nel.org" <jikos@...nel.org>,
        "peterz@...radead.org" <peterz@...radead.org>,
        "keescook@...gle.com" <keescook@...gle.com>,
        "arjan@...ux.intel.com" <arjan@...ux.intel.com>,
        "mingo@...nel.org" <mingo@...nel.org>,
        "hpa@...or.com" <hpa@...or.com>,
        "linux-tip-commits@...r.kernel.org" 
        <linux-tip-commits@...r.kernel.org>
Subject: Re: [tip:x86/pti] x86/retpoline: Fill RSB on context switch for
 affected CPUs

On Mon, 2018-01-15 at 14:35 +0000, David Laight wrote:
> From: David Woodhouse
> > 
> > Sent: 14 January 2018 17:04
> > x86/retpoline: Fill RSB on context switch for affected CPUs
> > 
> > On context switch from a shallow call stack to a deeper one, as the CPU
> > does 'ret' up the deeper side it may encounter RSB entries (predictions for
> > where the 'ret' goes to) which were populated in userspace.
> > 
> > This is problematic if neither SMEP nor KPTI (the latter of which marks
> > userspace pages as NX for the kernel) are active, as malicious code in
> > userspace may then be executed speculatively.
> ...
> 
> Do we have a guarantee that all cpu actually detect the related RSB underflow?
> 
> It wouldn't surprise me if at least some cpu just let it wrap.
> 
> This would means that userspace would see return predictions based
> on the values the kernel 'stuffed' into the RSB to fill it.
> 
> Potentially this leaks a kernel address to userspace.

Yeah, KASLR is dead unless we do a full IBPB before *every* VMLAUNCH or
return to userspace anyway, isn't it? With KPTI we could put the RSB-
stuffer into the syscall trampoline page perhaps...

For this to be a concern for userspace, I think it does have to be true
that only the lower bits are used, which adds a little complexity but
probably isn't insurmountable?


Download attachment "smime.p7s" of type "application/x-pkcs7-signature" (5213 bytes)