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Message-ID: <e9a192da-f603-6523-6d2e-858eb9c7d1b2@jonmasters.org>
Date: Tue, 16 Jan 2018 16:52:53 -0500
From: Jon Masters <jcm@...masters.org>
To: Jayachandran C <jnair@...iumnetworks.com>,
Will Deacon <will.deacon@....com>
Cc: marc.zyngier@....com, linux-arm-kernel@...ts.infradead.org,
lorenzo.pieralisi@....com, ard.biesheuvel@...aro.org,
catalin.marinas@....com, linux-kernel@...r.kernel.org,
labbott@...hat.com, christoffer.dall@...aro.org
Subject: Re: [PATCH v2] arm64: Branch predictor hardening for Cavium ThunderX2
On 01/09/2018 07:47 AM, Jayachandran C wrote:
> Use PSCI based mitigation for speculative execution attacks targeting
> the branch predictor. The approach is similar to the one used for
> Cortex-A CPUs, but in case of ThunderX2 we add another SMC call to
> test if the firmware supports the capability.
>
> If the secure firmware has been updated with the mitigation code to
> invalidate the branch target buffer, we use the PSCI version call to
> invoke it.
What's the status of this patch currently? Previously you had suggested
to hold while the SMC got standardized, but then you seemed happy with
pulling in. What's the latest?
Jon.
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