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Message-ID: <CAFqH_50Px_a=YQkDvA+APgL7xC_=Rz9WGM0xOzXwBg4FF0t2cg@mail.gmail.com>
Date:   Thu, 18 Jan 2018 17:51:38 +0100
From:   Enric Balletbo Serra <eballetbo@...il.com>
To:     Brian Norris <briannorris@...omium.org>
Cc:     William Wu <william.wu@...k-chips.com>,
        Felipe Balbi <balbi@...nel.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Heiko Stübner <heiko@...ech.de>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        linux-usb@...r.kernel.org,
        "open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>,
        Frank Wang <frank.wang@...k-chips.com>,
        huangtao@...k-chips.com, Doug Anderson <dianders@...gle.com>,
        Guenter Roeck <groeck@...gle.com>, daniel.meng@...k-chips.com,
        John.Youn@...opsys.com, lin.huang@...k-chips.com
Subject: Re: [PATCH] usb: dwc3: core: power on PHYs before initializing core

2018-01-17 22:46 GMT+01:00 Brian Norris <briannorris@...omium.org>:
> On Fri, Jan 12, 2018 at 12:00:16PM +0800, William Wu wrote:
>> The dwc3_core_init() gets the PHYs and initializes the PHYs with
>> the usb_phy_init() and phy_init() functions before initializing
>> core, and power on the PHYs after core initialization is done.
>>
>> However, some platforms (e.g. Rockchip RK3399 DWC3 with Type-C
>> USB3 PHY), it needs to do some special operation while power on
>> the Type-C PHY before initializing DWC3 core. It's because that
>> the RK3399 Type-C PHY requires to hold the DWC3 controller in
>> reset state to keep the PIPE power state in P2 while configuring
>> the Type-C PHY, otherwise, it may cause waiting for the PIPE ready
>> timeout. In this case, if we power on the PHYs after the DWC3 core
>> initialization is done, the core will be reset to uninitialized
>> state after power on the PHYs.
>>
>> Fix this by powering on the PHYs before initializing core. And
>> because the GUID register may also be reset in this case, so we
>> need to configure the GUID register after powering on the PHYs.
>>
>> Signed-off-by: William Wu <william.wu@...k-chips.com>
>
> This kinda should be part of your series:
>
> [PATCH 0/3] Reset USB3 controller before initializing Type-C PHY on rk3399
>

+1

> or at least mentioned there, because the series there doesn't quite
> right otherwise, no?
>
> Anyway, I think this patch looks OK. I don't immediately see good
> reasons for delaying the PHY init until later, and I do see reasons why
> it could be useful earlier:
>
> Reviewed-by: Brian Norris <briannorris@...omium.org>

Tested on Samsung Chromebook Plus with current mainline

Tested-by: Enric Balletbo i Serra <enric.balletbo@...omium.org>

>
>> ---
>>  drivers/usb/dwc3/core.c | 46 ++++++++++++++++++++++------------------------
>>  1 file changed, 22 insertions(+), 24 deletions(-)

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