linux-kernel - RE: [mm 4.15-rc8] Random oopses under memory pressure.

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Thu, 18 Jan 2018 17:26:15 +0000
From:   "Luck, Tony" <tony.luck@...el.com>
To:     "Kirill A. Shutemov" <kirill@...temov.name>,
        Andrea Arcangeli <aarcange@...hat.com>
CC:     Dave Hansen <dave.hansen@...ux.intel.com>,
        Tetsuo Handa <penguin-kernel@...ove.SAKURA.ne.jp>,
        "torvalds@...ux-foundation.org" <torvalds@...ux-foundation.org>,
        "kirill.shutemov@...ux.intel.com" <kirill.shutemov@...ux.intel.com>,
        "akpm@...ux-foundation.org" <akpm@...ux-foundation.org>,
        "hannes@...xchg.org" <hannes@...xchg.org>,
        "iamjoonsoo.kim@....com" <iamjoonsoo.kim@....com>,
        "mgorman@...hsingularity.net" <mgorman@...hsingularity.net>,
        "vbabka@...e.cz" <vbabka@...e.cz>,
        "mhocko@...nel.org" <mhocko@...nel.org>,
        "hillf.zj@...baba-inc.com" <hillf.zj@...baba-inc.com>,
        "hughd@...gle.com" <hughd@...gle.com>,
        "oleg@...hat.com" <oleg@...hat.com>,
        "peterz@...radead.org" <peterz@...radead.org>,
        "riel@...hat.com" <riel@...hat.com>,
        "srikar@...ux.vnet.ibm.com" <srikar@...ux.vnet.ibm.com>,
        "vdavydov.dev@...il.com" <vdavydov.dev@...il.com>,
        "mingo@...nel.org" <mingo@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-mm@...ck.org" <linux-mm@...ck.org>,
        "x86@...nel.org" <x86@...nel.org>
Subject: RE: [mm 4.15-rc8] Random oopses under memory pressure.

> Both are real page. But why do you expect pages to be 64-byte alinged?
> Both are aligned to 64-bit as they suppose to be IIUC.

On a 64-bit kernel sizeof struct page == 64 (after much work by people to
trim out excess stuff).  So I thought we made sure to align the base address
of blocks of "struct page" so that every one neatly fits into one cache line.

-Tony