lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 19 Jan 2018 14:28:27 +0530
From:   Rajneesh Bhardwaj <rajneesh.bhardwaj@...el.com>
To:     platform-driver-x86@...r.kernel.org
Cc:     dvhart@...radead.org, andy@...radead.org,
        linux-kernel@...r.kernel.org, vishwanath.somayaji@...el.com,
        srinivas.pandruvada@...ux.intel.com,
        Rajneesh Bhardwaj <rajneesh.bhardwaj@...el.com>
Subject: [Patch v1 8/8] platform/x86: intel_pmc_core: Special case for Coffeelake

Intel CoffeeLake SoC uses CPU ID of KabyLake but has Cannonlake PCH, so in
this case PMC register details from Cannonlake PCH must be used.

In order to identify whether the given platform is Coffeelake, scan for the
Sunrisepoint PMC PCI Id.

		KBL CPUID	SPT PCIID
-------------------------------------
KBL	|	Y	|	Y	|
-------------------------------------
CFL	|	Y	|	N	|
-------------------------------------

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@...el.com>
---
 drivers/platform/x86/intel_pmc_core.c | 14 ++++++++++++++
 drivers/platform/x86/intel_pmc_core.h |  2 ++
 2 files changed, 16 insertions(+)

diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c
index f0d067a33a56..67e85ee4ab32 100644
--- a/drivers/platform/x86/intel_pmc_core.c
+++ b/drivers/platform/x86/intel_pmc_core.c
@@ -25,6 +25,7 @@
 #include <linux/delay.h>
 #include <linux/io.h>
 #include <linux/module.h>
+#include <linux/pci.h>
 #include <linux/uaccess.h>
 
 #include <asm/cpu_device_id.h>
@@ -536,6 +537,11 @@ static const struct x86_cpu_id intel_pmc_core_ids[] = {
 
 MODULE_DEVICE_TABLE(x86cpu, intel_pmc_core_ids);
 
+static const struct pci_device_id pmc_pci_ids[] = {
+	{ PCI_VDEVICE(INTEL, SPT_PMC_PCI_DEVICE_ID), 0},
+	{ 0, },
+};
+
 static int __init pmc_core_probe(void)
 {
 	const struct x86_cpu_id *cpu_id;
@@ -549,6 +555,14 @@ static int __init pmc_core_probe(void)
 
 	pmcdev->map = (struct pmc_reg_map *)cpu_id->driver_data;
 
+	/*
+	 * Coffeelake has CPU ID of Kabylake and Cannonlake PCH. So here
+	 * Sunrisepoint PCH regmap can't be used. Use Cannonlake PCH regmap
+	 * in this case.
+	 */
+	if (!pci_dev_present(pmc_pci_ids))
+		pmcdev->map = (struct pmc_reg_map *)&cnp_reg_map;
+
 	if (lpit_read_residency_count_address(&slp_s0_addr))
 		pmcdev->base_addr = PMC_BASE_ADDR_DEFAULT;
 	else
diff --git a/drivers/platform/x86/intel_pmc_core.h b/drivers/platform/x86/intel_pmc_core.h
index 8b7731e6dea2..5fa5f97870aa 100644
--- a/drivers/platform/x86/intel_pmc_core.h
+++ b/drivers/platform/x86/intel_pmc_core.h
@@ -23,6 +23,8 @@
 
 #define PMC_BASE_ADDR_DEFAULT			0xFE000000
 
+/* Sunrise Point Power Management Controller PCI Device ID */
+#define SPT_PMC_PCI_DEVICE_ID			0x9d21
 #define SPT_PMC_BASE_ADDR_OFFSET		0x48
 #define SPT_PMC_SLP_S0_RES_COUNTER_OFFSET	0x13c
 #define SPT_PMC_PM_CFG_OFFSET			0x18
-- 
2.7.4

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ