lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20180119121821.77018-4-kirill.shutemov@linux.intel.com>
Date:   Fri, 19 Jan 2018 15:18:21 +0300
From:   "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
To:     Ingo Molnar <mingo@...hat.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        "H. Peter Anvin" <hpa@...or.com>, x86@...nel.org
Cc:     linux-kernel@...r.kernel.org, Dave Hansen <dave.hansen@...el.com>,
        "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
Subject: [PATCH 3/3] x86/asm: Add support for WBNOINVD instruction

This patch implements infrastructure to call WBNOINVD instruction.
The basic idea is to match what we have for WBINVD.

The instruction is defined as WBINVD with REP (0xf3) prefix. If the
machine doesn't support the instruction the prefix will be ignored and
we would fallback to WBINVD.

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@...ux.intel.com>
---
 arch/x86/include/asm/smp.h           | 10 ++++++++++
 arch/x86/include/asm/special_insns.h |  5 +++++
 arch/x86/lib/cache-smp.c             | 17 +++++++++++++++++
 3 files changed, 32 insertions(+)

diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h
index 461f53d27708..cadaf5e0ea92 100644
--- a/arch/x86/include/asm/smp.h
+++ b/arch/x86/include/asm/smp.h
@@ -140,6 +140,8 @@ void native_play_dead(void);
 void play_dead_common(void);
 void wbinvd_on_cpu(int cpu);
 int wbinvd_on_all_cpus(void);
+void wbnoinvd_on_cpu(int cpu);
+int wbnoinvd_on_all_cpus(void);
 
 void native_send_call_func_ipi(const struct cpumask *mask);
 void native_send_call_func_single_ipi(int cpu);
@@ -170,6 +172,14 @@ static inline int wbinvd_on_all_cpus(void)
 	wbinvd();
 	return 0;
 }
+
+#define wbnoinvd_on_cpu(cpu)     wbnoinvd()
+static inline int wbnoinvd_on_all_cpus(void)
+{
+	wbnoinvd();
+	return 0;
+}
+
 #define smp_num_siblings	1
 #endif /* CONFIG_SMP */
 
diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
index 0d9c28a7833d..03d01446fff6 100644
--- a/arch/x86/include/asm/special_insns.h
+++ b/arch/x86/include/asm/special_insns.h
@@ -134,6 +134,11 @@ static inline void wbinvd(void)
 	asm volatile("wbinvd": : :"memory");
 }
 
+static inline void wbnoinvd(void)
+{
+	asm volatile(".byte 0xf3; wbinvd": : :"memory");
+}
+
 extern asmlinkage void native_load_gs_index(unsigned);
 
 static inline unsigned long __read_cr4(void)
diff --git a/arch/x86/lib/cache-smp.c b/arch/x86/lib/cache-smp.c
index 1811fa4a1b1a..e881741d0367 100644
--- a/arch/x86/lib/cache-smp.c
+++ b/arch/x86/lib/cache-smp.c
@@ -18,3 +18,20 @@ int wbinvd_on_all_cpus(void)
 	return on_each_cpu(__wbinvd, NULL, 1);
 }
 EXPORT_SYMBOL(wbinvd_on_all_cpus);
+
+static void __wbnoinvd(void *dummy)
+{
+	wbnoinvd();
+}
+
+void wbnoinvd_on_cpu(int cpu)
+{
+	smp_call_function_single(cpu, __wbnoinvd, NULL, 1);
+}
+EXPORT_SYMBOL(wbnoinvd_on_cpu);
+
+int wbnoinvd_on_all_cpus(void)
+{
+	return on_each_cpu(__wbnoinvd, NULL, 1);
+}
+EXPORT_SYMBOL(wbnoinvd_on_all_cpus);
-- 
2.15.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ