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Message-Id: <1516449813-7654-1-git-send-email-dwmw@amazon.co.uk>
Date: Sat, 20 Jan 2018 12:03:29 +0000
From: David Woodhouse <dwmw@...zon.co.uk>
To: arjan@...ux.intel.com, tglx@...utronix.de, karahmed@...zon.de,
x86@...nel.org, linux-kernel@...r.kernel.org,
tim.c.chen@...ux.intel.com, bp@...en8.de, peterz@...radead.org,
pbonzini@...hat.com, ak@...ux.intel.com,
torvalds@...ux-foundation.org, gregkh@...ux-foundation.org
Subject: [PATCH 0/4] Basic Speculation Control feature support
This is the basis for using the newly-added microcode features for
speculation control on both Intel and AMD CPUs. We just add the
CPUID feature bits (with associated cleanup now we were using 5 bits
out of the same subleaf as "scattered" bits), add the MSR definitions,
and turn off KPTI for Intel CPUs which say they don't need it.
The rest of the bits to actually *use* the features are still being
worked out, but this much is fairly straightforward so it's a good
start.
David Woodhouse (4):
x86/cpufeatures: Add Intel feature bits for Speculation Control
x86/cpufeatures: Add AMD feature bits for Prediction Command
x86/msr: Add definitions for new speculation control MSRs
x86/pti: Do not enable PTI on fixed Intel processors
arch/x86/include/asm/cpufeature.h | 7 +++++--
arch/x86/include/asm/cpufeatures.h | 13 ++++++++++---
arch/x86/include/asm/disabled-features.h | 3 ++-
arch/x86/include/asm/msr-index.h | 11 +++++++++++
arch/x86/include/asm/required-features.h | 3 ++-
arch/x86/kernel/cpu/common.c | 10 ++++++++--
arch/x86/kernel/cpu/scattered.c | 3 +--
7 files changed, 39 insertions(+), 11 deletions(-)
--
2.7.4
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