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Message-Id: <20180123175656.11942-1-ilina@codeaurora.org>
Date: Tue, 23 Jan 2018 10:56:52 -0700
From: Lina Iyer <ilina@...eaurora.org>
To: tglx@...utronix.de, jason@...edaemon.net, marc.zyngier@....com
Cc: linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
sboyd@...eaurora.org, rnayak@...eaurora.org,
asathyak@...eaurora.org, Lina Iyer <ilina@...eaurora.org>
Subject: [PATCH RFC 0/4] irqchip: qcom: add support for PDC interrupt controller
On newer Qualcomm Techonologies Inc's SoCs like the SDM845, the GIC is in a
power domain that can be powered off when not needed. Interrupts that need to
be sensed even when the GIC is powered off, are routed through an interrupt
controller in an always-on domain called the Power Domain Controller a.k.a PDC.
This series adds support for the PDC's interrupt controller.
Please consider reviewing these patches.
Lina Iyer (4):
drivers: irqchip: pdc: add support for PDC interrupt controller
dt-bindings/interrupt-controller: pdc: descibe PDC device binding
drivers: irqchip: pdc: log PDC info in FTRACE
drivers: irqchip: qcom: add pin information for SDM845
.../bindings/interrupt-controller/qcom,pdc.txt | 55 ++++
drivers/irqchip/Kconfig | 9 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/qcom-pdc-sdm845.c | 130 +++++++++
drivers/irqchip/qcom-pdc.c | 291 +++++++++++++++++++++
drivers/irqchip/qcom-pdc.h | 31 +++
include/trace/events/pdc.h | 50 ++++
7 files changed, 567 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
create mode 100644 drivers/irqchip/qcom-pdc-sdm845.c
create mode 100644 drivers/irqchip/qcom-pdc.c
create mode 100644 drivers/irqchip/qcom-pdc.h
create mode 100644 include/trace/events/pdc.h
--
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