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Message-ID: <CAPKp9uY7z+HVNo9FOAfJ1zn-btcvFOt7mPCD0x_iLKUCfJOy6w@mail.gmail.com>
Date: Tue, 23 Jan 2018 18:15:17 +0000
From: Sudeep Holla <sudeep.holla@....com>
To: Lina Iyer <ilina@...eaurora.org>
Cc: Thomas Gleixner <tglx@...utronix.de>,
Jason Cooper <jason@...edaemon.net>,
Marc Zyngier <marc.zyngier@....com>,
open list <linux-kernel@...r.kernel.org>,
linux-arm-msm@...r.kernel.org, Stephen Boyd <sboyd@...eaurora.org>,
"Nayak, Rajendra" <rnayak@...eaurora.org>, asathyak@...eaurora.org
Subject: Re: [PATCH RFC 0/4] irqchip: qcom: add support for PDC interrupt controller
Hi Lina,
On Tue, Jan 23, 2018 at 5:56 PM, Lina Iyer <ilina@...eaurora.org> wrote:
> On newer Qualcomm Techonologies Inc's SoCs like the SDM845, the GIC is in a
> power domain that can be powered off when not needed. Interrupts that need to
> be sensed even when the GIC is powered off, are routed through an interrupt
> controller in an always-on domain called the Power Domain Controller a.k.a PDC.
> This series adds support for the PDC's interrupt controller.
>
Sorry for the basic questions:
1. Will the GIC be powered off in any other state other than System suspend ?
2. Why this needs to be done in Linux, why can't it be transparent and hidden
in the firmware doing the actual GIC power down ? I assume Linux is not
powering down the GIC.
3. I see some bits that enable secure interrupts in one of the patch.
Is that even
safe to allow Linux to enable some secure interrupts in PDC ?
--
Regards,
Sudeep
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