linux-kernel - Re: [PATCH v2 2/5] x86/cpufeatures: Add Intel feature bits for Speculation Control

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Message-ID: <3ebee57a-b116-68f6-0421-0640f5e552f5@intel.com>
Date:   Tue, 23 Jan 2018 10:43:07 -0800
From:   Dave Hansen <dave.hansen@...el.com>
To:     David Woodhouse <dwmw@...zon.co.uk>, arjan@...ux.intel.com,
        tglx@...utronix.de, karahmed@...zon.de, x86@...nel.org,
        linux-kernel@...r.kernel.org, tim.c.chen@...ux.intel.com,
        bp@...en8.de, peterz@...radead.org, pbonzini@...hat.com,
        ak@...ux.intel.com, torvalds@...ux-foundation.org,
        gregkh@...ux-foundation.org, thomas.lendacky@....com
Subject: Re: [PATCH v2 2/5] x86/cpufeatures: Add Intel feature bits for
 Speculation Control

On 01/23/2018 08:52 AM, David Woodhouse wrote:
> 
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index 7b25cf3..0a51070 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -320,6 +320,9 @@
>  /* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 18 */
>  #define X86_FEATURE_AVX512_4VNNIW	(18*32+ 2) /* AVX-512 Neural Network Instructions */
>  #define X86_FEATURE_AVX512_4FMAPS	(18*32+ 3) /* AVX-512 Multiply Accumulation Single precision */
> +#define X86_FEATURE_SPEC_CTRL		(18*32+26) /* Speculation Control (IBRS + IBPB) */
> +#define X86_FEATURE_STIBP		(18*32+27) /* Single Thread Indirect Branch Predictors */
> +#define X86_FEATURE_ARCH_CAPABILITIES	(18*32+29) /* IA32_ARCH_CAPABILITIES MSR (Intel) */

Should we be adding flags (STIBP) for which we currently have no user in
the kernel?