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Message-Id: <1516813025-10794-1-git-send-email-dwmw@amazon.co.uk>
Date:   Wed, 24 Jan 2018 16:56:59 +0000
From:   David Woodhouse <dwmw@...zon.co.uk>
To:     arjan@...ux.intel.com, tglx@...utronix.de, karahmed@...zon.de,
        x86@...nel.org, linux-kernel@...r.kernel.org,
        tim.c.chen@...ux.intel.com, bp@...en8.de, peterz@...radead.org,
        pbonzini@...hat.com, ak@...ux.intel.com,
        torvalds@...ux-foundation.org, gregkh@...ux-foundation.org,
        dave.hansen@...el.com, gnomes@...rguk.ukuu.org.uk
Subject: [PATCH v3 0/6] Basic Speculation Control feature support

Baby steps... this is just the basic CPUID and MSR definitions for AMD 
and Intel, followed by the complete no-brainer: Disable KPTI on Intel 
CPUs which set the RDCL_NO bit to say that they don't need it.

Roll in the microcode blacklist patch as I'm about to send that out
again anyway so it might as well be part of this. Treat it as an RFC
perhaps.

v2: Cleanups, add AMD bits for STIBP/SPEC_CTRL.
v3: Add more CPUs to the exemption for KPTI and clean that up.
    Add microcode blacklist (RFC)


David Woodhouse (6):
  x86/cpufeatures: Add CPUID_7_EDX CPUID leaf
  x86/cpufeatures: Add Intel feature bits for Speculation Control
  x86/cpufeatures: Add AMD feature bits for Speculation Control
  x86/msr: Add definitions for new speculation control MSRs
  x86/pti: Do not enable PTI on processors which are not vulnerable to
    Meltdown
  x86/cpufeature: Blacklist SPEC_CTRL on early Spectre v2 microcodes

 arch/x86/include/asm/cpufeature.h        |  7 ++-
 arch/x86/include/asm/cpufeatures.h       | 14 ++++--
 arch/x86/include/asm/disabled-features.h |  3 +-
 arch/x86/include/asm/msr-index.h         | 12 +++++
 arch/x86/include/asm/required-features.h |  3 +-
 arch/x86/kernel/cpu/common.c             | 35 ++++++++++++++-
 arch/x86/kernel/cpu/intel.c              | 76 ++++++++++++++++++++++++++++++++
 arch/x86/kernel/cpu/scattered.c          |  2 -
 8 files changed, 141 insertions(+), 11 deletions(-)

-- 
2.7.4

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