linux-kernel - Re: [PATCH] x86/centaur: Mark TSC invariant

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Message-ID: <20180124182642.0669c9bd@alans-desktop>
Date:   Wed, 24 Jan 2018 18:26:42 +0000
From:   Alan Cox <gnomes@...rguk.ukuu.org.uk>
To:     TimGuo <timguo@...oxin.com>
Cc:     <tglx@...utronix.de>, <mingo@...hat.com>, <hpa@...or.com>,
        <mingo@...nel.org>, <x86@...nel.org>, <linux-pm@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <brucechang@...-alliance.com>,
        <cooperyan@...oxin.com>, <qiyuanwang@...oxin.com>,
        <benjaminpan@...tech.com>
Subject: Re: [PATCH] x86/centaur: Mark TSC invariant

On Mon, 15 Jan 2018 09:35:45 +0800
TimGuo <timguo@...oxin.com> wrote:

> Centaur CPU has a constant frequency TSC and that TSC does not stop in C-States.
> But because the flags are not set for that CPU, the TSC is treated as non constant
> frequency and assumed to stop in C-States, which makes it an unreliable and unusable
> clock source. Setting those flags tells the kernel that the TSC is usable, so it
> will select it over HPET. The effect of this is that reading time stamps (from kernel
> or userspace) will be faster and more efficient.

And this is true for all processors back to  IDT WinChip ?

Alan