linux-kernel - RE: [tip:x86/hyperv] x86/hyperv: Stop suppressing X86_FEATURE

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Message-ID: <DM5PR2101MB0871A22B7835A5112CB0EB9ED9E10@DM5PR2101MB0871.namprd21.prod.outlook.com>
Date:   Thu, 25 Jan 2018 16:32:32 +0000
From:   David Zhang <dazhan@...rosoft.com>
To:     Andy Lutomirski <luto@...nel.org>,
        Haiyang Zhang <haiyangz@...rosoft.com>,
        KY Srinivasan <kys@...rosoft.com>,
        LKML <linux-kernel@...r.kernel.org>,
        "H. Peter Anvin" <hpa@...or.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        "Thomas Gleixner" <tglx@...utronix.de>,
        "Michael Kelley (EOSG)" <Michael.H.Kelley@...rosoft.com>,
        Aditya Bhandari <adityabh@...rosoft.com>,
        Ingo Molnar <mingo@...nel.org>,
        Stephen Hemminger <sthemmin@...rosoft.com>
CC:     "linux-tip-commits@...r.kernel.org" 
        <linux-tip-commits@...r.kernel.org>
Subject: RE: [tip:x86/hyperv] x86/hyperv: Stop suppressing X86_FEATURE_PCID

When the FLUSH_ALL_VIRTUAL_ADDRESS_SPACES flag (0x2) is not specified, the flush hypercall matches the AddressSpace parameter with the base address of the page table root on each processor (the base address is page-aligned in long/32-bit mode, 32-byte aligned in PAE mode). If there is a match, it flushes the specified VAs, for all PCIDs.

The flush hypercall is allowed to flush more than the above, however.

We will update the TLFS with this behavior. 

-----Original Message-----
From: Andy Lutomirski [mailto:luto@...nel.org] 
Sent: Wednesday, January 24, 2018 8:28 AM
To: David Zhang <dazhan@...rosoft.com>; Haiyang Zhang <haiyangz@...rosoft.com>; KY Srinivasan <kys@...rosoft.com>; LKML <linux-kernel@...r.kernel.org>; H. Peter Anvin <hpa@...or.com>; Andrew Lutomirski <luto@...nel.org>; Vitaly Kuznetsov <vkuznets@...hat.com>; Thomas Gleixner <tglx@...utronix.de>; Michael Kelley (EOSG) <Michael.H.Kelley@...rosoft.com>; Aditya Bhandari <adityabh@...rosoft.com>; Ingo Molnar <mingo@...nel.org>; Stephen Hemminger <sthemmin@...rosoft.com>
Cc: linux-tip-commits@...r.kernel.org
Subject: Re: [tip:x86/hyperv] x86/hyperv: Stop suppressing X86_FEATURE_PCID

On Wed, Jan 24, 2018 at 4:48 AM, tip-bot for Vitaly Kuznetsov <tipbot@...or.com> wrote:
> Commit-ID:  04651dd978a8749e59065df14b970a127f219ac2
> Gitweb:     https://na01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.kernel.org%2Ftip%2F04651dd978a8749e59065df14b970a127f219ac2&data=02%7C01%7Cdazhan%40microsoft.com%7C59a83800e5b84e1bb97008d56347705b%7Cee3303d7fb734b0c8589bcd847f1c277%7C1%7C0%7C636524080843155861&sdata=qA5eG6L9MieOSWL8SCBQaWcYJtN7IT75rO0I1PdoZ%2FE%3D&reserved=0
> Author:     Vitaly Kuznetsov <vkuznets@...hat.com>
> AuthorDate: Wed, 24 Jan 2018 11:36:29 +0100
> Committer:  Thomas Gleixner <tglx@...utronix.de>
> CommitDate: Wed, 24 Jan 2018 13:44:57 +0100
>
> x86/hyperv: Stop suppressing X86_FEATURE_PCID
>
> When hypercall-based TLB flush was enabled for Hyper-V guests PCID 
> feature was deliberately suppressed as a precaution: back then PCID 
> was never exposed to Hyper-V guests and it wasn't clear what will 
> happen if some day it becomes available. The day came and PCID/INVPCID 
> features are already exposed on certain Hyper-V hosts.
>
> From TLFS (as of 5.0b) it is unclear how TLB flush hypercalls combine 
> with PCID. In particular the usage of PCID is per-cpu based: the same 
> mm gets different CR3 values on different CPUs. If the hypercall does 
> exact matching this will fail. However, this is not the case. David 
> Zhang
> explains:
>
>  "In practice, the AddressSpace argument is ignored on any VM that supports
>   PCIDs.
>
>   Architecturally, the AddressSpace argument must match the CR3 with PCID
>   bits stripped out (i.e., the low 12 bits of AddressSpace should be 0 in
>   long mode). The flush hypercalls flush all PCIDs for the specified
>   AddressSpace."
>
> With this, PCID can be enabled.

So what, exactly, does the flush hypercall do?

--Andy