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Message-ID: <20180126090542.bsza7hqqinqwllcr@yury-thinkpad>
Date: Fri, 26 Jan 2018 12:05:42 +0300
From: Yury Norov <ynorov@...iumnetworks.com>
To: Will Deacon <will.deacon@....com>
Cc: linux-arm-kernel@...ts.infradead.org, linux-arch@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-crypto@...r.kernel.org,
Al Viro <viro@...iv.linux.org.uk>,
Andrew Morton <akpm@...ux-foundation.org>,
Andrew Pinski <Andrew.Pinski@...ium.com>,
Arnd Bergmann <arnd@...db.de>,
Catalin Marinas <catalin.marinas@....com>,
"David S . Miller" <davem@...emloft.net>,
Geethasowjanya Akula <Geethasowjanya.Akula@...ium.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Ingo Molnar <mingo@...nel.org>,
Kees Cook <keescook@...omium.org>,
Laura Abbott <labbott@...hat.com>,
Nicholas Piggin <npiggin@...il.com>,
Sunil Goutham <Sunil.Goutham@...ium.com>
Subject: Re: [PATCH RFC 0/3] API for 128-bit IO access
On Wed, Jan 24, 2018 at 10:22:13AM +0000, Will Deacon wrote:
> On Wed, Jan 24, 2018 at 12:05:16PM +0300, Yury Norov wrote:
> > This series adds API for 128-bit memory IO access and enables it for ARM64.
> > The original motivation for 128-bit API came from new Cavium network device
> > driver. The hardware requires 128-bit access to make things work. See
> > description in patch 3 for details.
> >
> > Also, starting from ARMv8.4, stp and ldp instructions become atomic, and
> > API for 128-bit access would be helpful in core arm64 code.
>
> Only for normal, cacheable memory, so they're not suitable for IO accesses
> as you're proposing here.
Hi Will,
Thanks for clarification.
Could you elaborate, do you find 128-bit read/write API useless, or
you just correct my comment?
I think that ordered uniform 128-bit access API would be helpful, even
if not atomic.
Yury.
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