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Message-ID: <1516987905.30244.250.camel@infradead.org>
Date: Fri, 26 Jan 2018 17:31:45 +0000
From: David Woodhouse <dwmw2@...radead.org>
To: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Dave Hansen <dave.hansen@...el.com>,
Liran Alon <liran.alon@...cle.com>,
Laura Abbott <labbott@...hat.com>,
Andrew Lutomirski <luto@...nel.org>,
Janakarajan Natarajan <Janakarajan.Natarajan@....com>,
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"Mallick, Asit K" <asit.k.mallick@...el.com>,
Radim Krčmář <rkrcmar@...hat.com>,
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Peter Anvin <hpa@...or.com>,
Jun Nakajima <jun.nakajima@...el.com>,
Ingo Molnar <mingo@...hat.com>,
the arch/x86 maintainers <x86@...nel.org>,
Ashok Raj <ashok.raj@...el.com>,
"Van De Ven, Arjan" <arjan.van.de.ven@...el.com>,
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KVM list <kvm@...r.kernel.org>
Subject: Re: [RFC 09/10] x86/enter: Create macros to restrict/unrestrict
Indirect Branch Speculation
On Fri, 2018-01-26 at 17:29 +0000, David Woodhouse wrote:
> On Fri, 2018-01-26 at 09:19 -0800, Linus Torvalds wrote:
> > On Fri, Jan 26, 2018 at 1:11 AM, David Woodhouse <dwmw2@...radead.org> wrote:
> > > Do we need to look again at the fact that we've disabled the RSB-
> > > stuffing for SMEP?
> >
> > Absolutely. SMEP helps make people a lot less worried about things,
> > but it doesn't fix the "BTB only contains partial addresses" case.
> >
> > But did we do that "disable stuffing with SMEP"? I'm not seeing it. In
> > my tree, it's only conditional on X86_FEATURE_RETPOLINE.
>
> That's the vmexit one. The one on context switch is in
> commit c995efd5a7 and has its own X86_FEATURE_RSB_CTXSW which in
> kernel/cpu/bugs.c is turned on for (!SMEP || Skylake).
>
> The "low bits of the BTB" issue probably means that wants to be
> X86_FEATURE_RETPOLINE too. Despite Intel's doc saying otherwise.
>
> (Intel's doc also says to do it on kernel entry, but we elected to do
> it on context switch instead since *that's* when the imbalances show up
> in the RSB.)
Note, we've switched from talking about BTB to RSB here, so this is a
valid concern if the *RSB* only has the low bits of the target.
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