linux-kernel - Re: [PATCH] x86/cpuid: Fix up "virtual" IBRS/IBPB/STIBP feature bits on Intel

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Tue, 30 Jan 2018 12:18:48 +0100
From:   Borislav Petkov <bp@...en8.de>
To:     David Woodhouse <dwmw2@...radead.org>
Cc:     arjan@...ux.intel.com, tglx@...utronix.de, karahmed@...zon.de,
        x86@...nel.org, linux-kernel@...r.kernel.org,
        tim.c.chen@...ux.intel.com, peterz@...radead.org,
        pbonzini@...hat.com, ak@...ux.intel.com,
        torvalds@...ux-foundation.org, gregkh@...ux-foundation.org
Subject: Re: [PATCH] x86/cpuid: Fix up "virtual" IBRS/IBPB/STIBP feature bits
 on Intel

On Tue, Jan 30, 2018 at 11:03:50AM +0000, David Woodhouse wrote:
> I pondered that, but I didn't like it. I didn't want to always *force*
> those features on, for all CPUs, just because they happened to be
> discovered at boot time on the first CPU (which *did* have its
> microcode updated by the crappy BIOS, while the others didn't).
> 
> I strongly suspect that's purely an academic concern, and we mostly
> check boot_cpu_has() and never even *notice* if secondary CPUs don't
> match. I just didn't want to make that *worse*. It tickled my OCD.

Well, you need to do it because those bits are AMD-specific and they are
not set in the Intel CPUID leaf and identify_cpu() towards the end takes
care of "ironing" all those bits out which are not part of the common
feature set and which get_cpu_cap() has *not* read out from CPUID.

It is one of those I-told-you-so moments when I suggested to make the
visible feature bits the artificial ones and have the *actual* hardware
ones set those.

:-)

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.