[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20180201091137.GX2269@hirez.programming.kicks-ass.net>
Date: Thu, 1 Feb 2018 10:11:37 +0100
From: Peter Zijlstra <peterz@...radead.org>
To: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
Cc: "Rafael J. Wysocki" <rjw@...ysocki.net>,
Mel Gorman <mgorman@...hsingularity.net>,
Mike Galbraith <efault@....de>,
Matt Fleming <matt@...eblueprint.co.uk>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 4/4] sched/fair: Use a recently used CPU as an idle
candidate and the basis for SIS
On Wed, Jan 31, 2018 at 09:44:18AM -0800, Srinivas Pandruvada wrote:
> Much more throttling required compared to PERF_CTL. MSR_HWP_REQUEST is
> much slower compared to PERF_CTL (as high as 10:1).
Still much better than what other architectures have to deal with ;-)
Powered by blists - more mailing lists