linux-kernel - Re: [PATCH V2 2/2] cpufreq: imx6q: add 696MHz operating point for i.mx6ul

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Message-ID: <20180202004713.GC20833@dragon>
Date:   Fri, 2 Feb 2018 08:47:15 +0800
From:   Shawn Guo <shawnguo@...nel.org>
To:     Anson Huang <Anson.Huang@....com>
Cc:     kernel@...gutronix.de, fabio.estevam@....com, robh+dt@...nel.org,
        mark.rutland@....com, rjw@...ysocki.net, linux@...linux.org.uk,
        viresh.kumar@...aro.org, rafael@...nel.org,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org
Subject: Re: [PATCH V2 2/2] cpufreq: imx6q: add 696MHz operating point for
 i.mx6ul

On Sat, Jan 06, 2018 at 06:42:40PM +0800, Anson Huang wrote:
> Add 696MHz operating point for i.MX6UL, only for those
> parts with speed grading fuse set to 2b'10 supports
> 696MHz operating point, so, speed grading check is also
> added for i.MX6UL in this patch, the clock tree for each
> operating point are as below:
> 
> 696MHz:
>     pll1                       696000000
>        pll1_bypass             696000000
>           pll1_sys             696000000
>              pll1_sw           696000000
>                 arm            696000000
> 528MHz:
>     pll2                       528000000
>        pll2_bypass             528000000
>           pll2_bus             528000000
>              ca7_secondary_sel 528000000
>                 step           528000000
>                    pll1_sw     528000000
>                       arm      528000000
> 396MHz:
>     pll2_pfd2_396m             396000000
>        ca7_secondary_sel       396000000
>           step                 396000000
>              pll1_sw           396000000
>                 arm            396000000
> 198MHz:
>     pll2_pfd2_396m             396000000
>        ca7_secondary_sel       396000000
>           step                 396000000
>              pll1_sw           396000000
>                 arm            198000000
> 
> Signed-off-by: Anson Huang <Anson.Huang@....com>

Acked-by: Shawn Guo <shawnguo@...nel.org>