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Message-ID: <87d9fe82685c00e331b7c1156d2967eb@codeaurora.org>
Date:   Sat, 03 Feb 2018 17:03:40 +0530
From:   Abhishek Sahu <absahu@...eaurora.org>
To:     Sricharan R <sricharan@...eaurora.org>
Cc:     robh+dt@...nel.org, robh@...nel.org, mark.rutland@....com,
        linux@...linux.org.uk, andy.gross@...aro.org,
        david.brown@...aro.org, catalin.marinas@....com,
        will.deacon@....com, sboyd@...eaurora.org,
        bjorn.andersson@...aro.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
        linux-arm-msm-owner@...r.kernel.org
Subject: Re: [PATCH 08/15] ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk04.1-c5
 board file

On 2018-01-29 10:41, Sricharan R wrote:
> dk04.1-c5 has a spinand connected to spi bus0 chipselect 1.
> 
> Signed-off-by: Sricharan R <sricharan@...eaurora.org>
> ---
>  arch/arm/boot/dts/Makefile                      |  1 +
>  arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c5.dts | 23
> +++++++++++++++++++++++
>  2 files changed, 24 insertions(+)

  <snip>

> +		spi_0: spi@...5000 { /* BLSP1 QUP1 */
> +			status = "ok";
> +			cs-gpios = <&tlmm 12 0>, <&tlmm 45 0>;

  Same applies here also. We need to add pinumx
  for gpio45.

  Thanks,
  Abhishek

> +			num-cs = <2>;
> +
> +			mt29f@1 {
> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +				compatible = "spinand,mt29f";
> +				reg = <1>;
> +				spi-max-frequency = <24000000>;
> +			};
> +		};
> +	};
> +};

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