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Message-ID: <20180205024914.os5dq5wip344hefe@rob-hp-laptop>
Date: Mon, 5 Feb 2018 00:08:31 -0600
From: Rob Herring <robh@...nel.org>
To: Ryder Lee <ryder.lee@...iatek.com>
Cc: Stephen Boyd <sboyd@...eaurora.org>,
Mark Brown <broonie@...nel.org>,
Lee Jones <lee.jones@...aro.org>,
Matthias Brugger <matthias.bgg@...il.com>,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-clk@...r.kernel.org, Garlic Tseng <garlic.tseng@...iatek.com>
Subject: Re: [PATCH v2 1/5] clk: mediatek: update missing clock data for
MT7622 audsys
On Wed, Jan 31, 2018 at 03:42:41PM +0800, Ryder Lee wrote:
> Add missing clock data 'CLK_AUDIO_AFE_CONN' for MT7622 audsys.
>
> Signed-off-by: Ryder Lee <ryder.lee@...iatek.com>
> ---
> drivers/clk/mediatek/clk-mt7622-aud.c | 1 +
> include/dt-bindings/clock/mt7622-clk.h | 3 ++-
> 2 files changed, 3 insertions(+), 1 deletion(-)
Reviewed-by: Rob Herring <robh@...nel.org>
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