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Date: Tue, 6 Feb 2018 03:23:23 +0800
From: kbuild test robot <lkp@...el.com>
To: Philippe Cornu <philippe.cornu@...com>
Cc: kbuild-all@...org, Yannick Fertre <yannick.fertre@...com>,
Philippe Cornu <philippe.cornu@...com>,
Benjamin Gaignard <benjamin.gaignard@...aro.org>,
Vincent Abriou <vincent.abriou@...com>,
David Airlie <airlied@...ux.ie>,
dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
Mickael Reulier <mickael.reulier@...com>,
Alexandre Torgue <alexandre.torgue@...com>,
Fabien Dessenne <fabien.dessenne@...com>
Subject: Re: [PATCH v1 1/2] drm/stm: ltdc: add non-alpha color formats
Hi Philippe,
I love your patch! Yet something to improve:
[auto build test ERROR on drm/drm-next]
[also build test ERROR on v4.15 next-20180205]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Philippe-Cornu/drm-stm-ltdc-add-non-alpha-color-formats/20180201-211736
base: git://people.freedesktop.org/~airlied/linux.git drm-next
config: arm-allmodconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm
All errors (new ones prefixed by >>):
drivers/gpu//drm/stm/ltdc.c: In function 'ltdc_plane_atomic_update':
>> drivers/gpu//drm/stm/ltdc.c:661:17: error: 'const struct drm_format_info' has no member named 'has_alpha'
if (!fb->format->has_alpha)
^~
vim +661 drivers/gpu//drm/stm/ltdc.c
587
588 static void ltdc_plane_atomic_update(struct drm_plane *plane,
589 struct drm_plane_state *oldstate)
590 {
591 struct ltdc_device *ldev = plane_to_ltdc(plane);
592 struct drm_plane_state *state = plane->state;
593 struct drm_framebuffer *fb = state->fb;
594 u32 lofs = plane->index * LAY_OFS;
595 u32 x0 = state->crtc_x;
596 u32 x1 = state->crtc_x + state->crtc_w - 1;
597 u32 y0 = state->crtc_y;
598 u32 y1 = state->crtc_y + state->crtc_h - 1;
599 u32 src_x, src_y, src_w, src_h;
600 u32 val, pitch_in_bytes, line_length, paddr, ahbp, avbp, bpcr;
601 enum ltdc_pix_fmt pf;
602
603 if (!state->crtc || !fb) {
604 DRM_DEBUG_DRIVER("fb or crtc NULL");
605 return;
606 }
607
608 /* convert src_ from 16:16 format */
609 src_x = state->src_x >> 16;
610 src_y = state->src_y >> 16;
611 src_w = state->src_w >> 16;
612 src_h = state->src_h >> 16;
613
614 DRM_DEBUG_DRIVER("plane:%d fb:%d (%dx%d)@(%d,%d) -> (%dx%d)@(%d,%d)\n",
615 plane->base.id, fb->base.id,
616 src_w, src_h, src_x, src_y,
617 state->crtc_w, state->crtc_h,
618 state->crtc_x, state->crtc_y);
619
620 bpcr = reg_read(ldev->regs, LTDC_BPCR);
621 ahbp = (bpcr & BPCR_AHBP) >> 16;
622 avbp = bpcr & BPCR_AVBP;
623
624 /* Configures the horizontal start and stop position */
625 val = ((x1 + 1 + ahbp) << 16) + (x0 + 1 + ahbp);
626 reg_update_bits(ldev->regs, LTDC_L1WHPCR + lofs,
627 LXWHPCR_WHSTPOS | LXWHPCR_WHSPPOS, val);
628
629 /* Configures the vertical start and stop position */
630 val = ((y1 + 1 + avbp) << 16) + (y0 + 1 + avbp);
631 reg_update_bits(ldev->regs, LTDC_L1WVPCR + lofs,
632 LXWVPCR_WVSTPOS | LXWVPCR_WVSPPOS, val);
633
634 /* Specifies the pixel format */
635 pf = to_ltdc_pixelformat(fb->format->format);
636 for (val = 0; val < NB_PF; val++)
637 if (ldev->caps.pix_fmt_hw[val] == pf)
638 break;
639
640 if (val == NB_PF) {
641 DRM_ERROR("Pixel format %.4s not supported\n",
642 (char *)&fb->format->format);
643 val = 0; /* set by default ARGB 32 bits */
644 }
645 reg_update_bits(ldev->regs, LTDC_L1PFCR + lofs, LXPFCR_PF, val);
646
647 /* Configures the color frame buffer pitch in bytes & line length */
648 pitch_in_bytes = fb->pitches[0];
649 line_length = drm_format_plane_cpp(fb->format->format, 0) *
650 (x1 - x0 + 1) + (ldev->caps.bus_width >> 3) - 1;
651 val = ((pitch_in_bytes << 16) | line_length);
652 reg_update_bits(ldev->regs, LTDC_L1CFBLR + lofs,
653 LXCFBLR_CFBLL | LXCFBLR_CFBP, val);
654
655 /* Specifies the constant alpha value */
656 val = CONSTA_MAX;
657 reg_update_bits(ldev->regs, LTDC_L1CACR + lofs, LXCACR_CONSTA, val);
658
659 /* Specifies the blending factors */
660 val = BF1_PAXCA | BF2_1PAXCA;
> 661 if (!fb->format->has_alpha)
662 val = BF1_CA | BF2_1CA;
663
664 reg_update_bits(ldev->regs, LTDC_L1BFCR + lofs,
665 LXBFCR_BF2 | LXBFCR_BF1, val);
666
667 /* Configures the frame buffer line number */
668 val = y1 - y0 + 1;
669 reg_update_bits(ldev->regs, LTDC_L1CFBLNR + lofs, LXCFBLNR_CFBLN, val);
670
671 /* Sets the FB address */
672 paddr = (u32)drm_fb_cma_get_gem_addr(fb, state, 0);
673
674 DRM_DEBUG_DRIVER("fb: phys 0x%08x", paddr);
675 reg_write(ldev->regs, LTDC_L1CFBAR + lofs, paddr);
676
677 /* Enable layer and CLUT if needed */
678 val = fb->format->format == DRM_FORMAT_C8 ? LXCR_CLUTEN : 0;
679 val |= LXCR_LEN;
680 reg_update_bits(ldev->regs, LTDC_L1CR + lofs,
681 LXCR_LEN | LXCR_CLUTEN, val);
682
683 mutex_lock(&ldev->err_lock);
684 if (ldev->error_status & ISR_FUIF) {
685 DRM_DEBUG_DRIVER("Fifo underrun\n");
686 ldev->error_status &= ~ISR_FUIF;
687 }
688 if (ldev->error_status & ISR_TERRIF) {
689 DRM_DEBUG_DRIVER("Transfer error\n");
690 ldev->error_status &= ~ISR_TERRIF;
691 }
692 mutex_unlock(&ldev->err_lock);
693 }
694
---
0-DAY kernel test infrastructure Open Source Technology Center
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