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Message-ID: <1517934852-23255-12-git-send-email-pdeschrijver@nvidia.com>
Date:   Tue, 6 Feb 2018 18:34:12 +0200
From:   Peter De Schrijver <pdeschrijver@...dia.com>
To:     <linux-tegra@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <mturquette@...libre.com>, <sboyd@...eaurora.org>,
        <robh+dt@...nel.org>, <mark.rutland@....com>,
        <devicetree@...r.kernel.org>, <lgirdwood@...il.com>,
        <broonie@...nel.org>, <linux-kernel@...r.kernel.org>
CC:     Peter De Schrijver <pdeschrijver@...dia.com>
Subject: [PATCH v3 11/11] arm64: dts: nvidia: Tegra210 CPU clock definition

Signed-off-by: Peter De Schrijver <pdeschrijver@...dia.com>
---
 arch/arm64/boot/dts/nvidia/tegra210.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index bc9851a..a7fddae 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -1229,6 +1229,13 @@
 			device_type = "cpu";
 			compatible = "arm,cortex-a57";
 			reg = <0>;
+			clocks = <&tegra_car TEGRA210_CLK_CCLK_G>,
+				 <&tegra_car TEGRA210_CLK_PLL_X>,
+				 <&tegra_car TEGRA210_CLK_PLL_P_OUT_CPU>,
+				 <&dfll>;
+			clock-names = "cpu_g", "pll_x", "pll_p", "dfll";
+			/* FIXME: what's the actual transition time? */
+			clock-latency = <300000>;
 		};
 
 		cpu@1 {
-- 
1.9.1

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