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Message-Id: <20180206180905.29047-1-ilina@codeaurora.org>
Date: Tue, 6 Feb 2018 11:09:03 -0700
From: Lina Iyer <ilina@...eaurora.org>
To: tglx@...utronix.de, jason@...edaemon.net, marc.zyngier@....com
Cc: linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
rnayak@...eaurora.org, asathyak@...eaurora.org,
Lina Iyer <ilina@...eaurora.org>
Subject: [PATCH v3 0/2] irqchip: qcom: add support for PDC interrupt controller
Changes since RFC v2:
- Fixed up DT probe based on suggestions from Thomas and Marc
- Code clean up as suggested by Thomas
- Switch to SPDX license marker
- Dropped the FTRACE patch for now, will need more thought and discussions
On newer Qualcomm Techonologies Inc's SoCs like the SDM845, the GIC is in a
power domain that can be powered off when not needed. Interrupts that need to
be sensed even when the GIC is powered off, are routed through an interrupt
controller in an always-on domain called the Power Domain Controller a.k.a PDC.
This series adds support for the PDC's interrupt controller.
Please consider reviewing these patches.
RFC v1: https://patchwork.kernel.org/patch/10180857/
RFC v2: https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1600634.html
Lina Iyer (2):
drivers: irqchip: pdc: Add PDC interrupt controller for QCOM SoCs
dt-bindings/interrupt-controller: pdc: descibe PDC device binding
.../bindings/interrupt-controller/qcom,pdc.txt | 80 ++++++
drivers/irqchip/Kconfig | 9 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/qcom-pdc.c | 302 +++++++++++++++++++++
4 files changed, 392 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
create mode 100644 drivers/irqchip/qcom-pdc.c
--
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