linux-kernel - Re: [PATCH tip-pti 2/2] x86/entry: interleave XOR register clearing with PUSH/MOV instructions

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Message-ID: <CA+55aFzRMn6+tFFkAbMT_iDcMphDZFU9+OALEn+ecqa7=RqvUA@mail.gmail.com>
Date:   Tue, 6 Feb 2018 17:30:40 -0800
From:   Linus Torvalds <torvalds@...ux-foundation.org>
To:     Andi Kleen <ak@...ux.intel.com>
Cc:     Dominik Brodowski <linux@...inikbrodowski.net>,
        Ingo Molnar <mingo@...nel.org>,
        Dan Williams <dan.j.williams@...el.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Andrew Lutomirski <luto@...nel.org>,
        "the arch/x86 maintainers" <x86@...nel.org>
Subject: Re: [PATCH tip-pti 2/2] x86/entry: interleave XOR register clearing
 with PUSH/MOV instructions

On Tue, Feb 6, 2018 at 3:54 PM, Andi Kleen <ak@...ux.intel.com> wrote:
>
> But for push, on older CPUs (older AMD, most Atoms, really old Intel big core)
> sub+mov is a lot faster than push because push has additional dependencies
> causing pipeline bubbles. So you would make these cases slower if you
> use PUSH.

I refuse to optimize for old CPU's.

Also, even for old CPU's, the push sequence is *much* smaller than the
mov sequence. And really, just a single extra cache miss more than
eats up any advantage you get from decoding.

> PS it was never fully clear to me why we removed the fast path. After all it
> could still be useful on the future CPUs with Spectre hardware fixes.

The fastpath really messes up all these cleanups, and forced that
"mov" sequence and illegible code.

Plus the fastpath couldn't clear those registers anyway, since it
didn't even _save_ them - exactly because the whole point of the
fastpath was that not all registers are clobbered by the calling
conventions.

We can try to see if it's worth re-instating in a few years when
hopefully fixed CPU's will be the norm. Right now the fast path
definitely made no sense.

           Linus