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Message-ID: <4db5c81b-0e55-3676-d7c8-d1b6aefb99c4@gmail.com>
Date:   Wed, 7 Feb 2018 12:43:56 +0100
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     sean.wang@...iatek.com, robh+dt@...nel.org, mark.rutland@....com,
        devicetree@...r.kernel.org, linux-mediatek@...ts.infradead.org
Cc:     linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 14/16] arm64: dts: mt7622: add thermal and related
 nodes



On 02/06/2018 10:53 AM, sean.wang@...iatek.com wrote:
> From: Sean Wang <sean.wang@...iatek.com>
> 
> add nodes for the thermal controller and associated thermal zone using
> CPU as the cooling device for each trip point. In addition, add a fixup
> for thermal_calibration on nvmem should be 12 bytes as the minimal
> requirement.
> 
> Signed-off-by: Sean Wang <sean.wang@...iatek.com>
> ---
>  arch/arm64/boot/dts/mediatek/mt7622.dtsi | 72 +++++++++++++++++++++++++++++++-
>  1 file changed, 71 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> index e6dd4f6..6cf67dd 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> @@ -12,6 +12,7 @@
>  #include <dt-bindings/phy/phy.h>
>  #include <dt-bindings/power/mt7622-power.h>
>  #include <dt-bindings/reset/mt7622-reset.h>
> +#include <dt-bindings/thermal/thermal.h>
>  
>  / {
>  	compatible = "mediatek,mt7622";
> @@ -75,6 +76,7 @@
>  				 <&apmixedsys CLK_APMIXED_MAIN_CORE_EN>;
>  			clock-names = "cpu", "intermediate";
>  			operating-points-v2 = <&cpu_opp_table>;
> +			#cooling-cells = <2>;
>  			enable-method = "psci";
>  			clock-frequency = <1300000000>;
>  		};
> @@ -119,6 +121,58 @@
>  		};
>  	};
>  
> +	thermal-zones {
> +		cpu_thermal: cpu-thermal {
> +			polling-delay-passive = <1000>;
> +			polling-delay = <1000>;
> +
> +			thermal-sensors = <&thermal 0>;
> +
> +			trips {
> +				cpu_passive: cpu-passive {
> +					temperature = <47000>;
> +					hysteresis = <2000>;
> +					type = "passive";
> +				};
> +
> +				cpu_active: cpu-active {
> +					temperature = <67000>;
> +					hysteresis = <2000>;
> +					type = "active";
> +				};
> +
> +				cpu_hot: cpu-hot {
> +					temperature = <87000>;
> +					hysteresis = <2000>;
> +					type = "hot";
> +				};
> +
> +				cpu-crit {
> +					temperature = <107000>;
> +					hysteresis = <2000>;
> +					type = "critical";
> +				};
> +			};
> +
> +			cooling-maps {
> +				map0 {
> +					trip = <&cpu_passive>;
> +					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +				};
> +
> +				map1 {
> +					trip = <&cpu_active>;
> +					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +				};
> +
> +				map2 {
> +					trip = <&cpu_hot>;
> +					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +				};
> +			};
> +		};
> +	};
> +
>  	timer {
>  		compatible = "arm,armv8-timer";
>  		interrupt-parent = <&gic>;
> @@ -201,7 +255,7 @@
>  		#size-cells = <1>;
>  
>  		thermal_calibration: calib@198 {
> -			reg = <0x198 0x8>;
> +			reg = <0x198 0xc>;

Any reason why this is not part of patch 8/16?

Regards,
Matthias

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