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Message-Id: <20180207134553.13510-5-brgl@bgdev.pl>
Date:   Wed,  7 Feb 2018 14:45:50 +0100
From:   Bartosz Golaszewski <brgl@...ev.pl>
To:     Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Sekhar Nori <nsekhar@...com>,
        Kevin Hilman <khilman@...nel.org>,
        Russell King <linux@...linux.org.uk>,
        David Lechner <david@...hnology.com>
Cc:     devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        Bartosz Golaszewski <bgolaszewski@...libre.com>
Subject: [PATCH 4/7] ARM: dts: da850: add power controller nodes

From: Bartosz Golaszewski <bgolaszewski@...libre.com>

Add two power controller nodes corresponding with the two PSC modules
present on the da850 SoC.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@...libre.com>
---
 arch/arm/boot/dts/da850.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 3a1f2ced05ca..ac2eef4e6b7c 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -24,6 +24,11 @@
 		};
 	};
 
+	aliases {
+		pwc0 = &pwc0;
+		pwc1 = &pwc1;
+	};
+
 	opp_table: opp-table {
 		compatible = "operating-points-v2";
 
@@ -141,6 +146,10 @@
 				      "pll0_sysclk4", "pll0_sysclk6",
 				      "async1";
 		};
+		pwc0: power-controller@...00 {
+			compatible = "ti,davinci-pm-domains";
+			#power-domain-cells = <0>;
+		};
 		pll0: clock-controller@...00 {
 			compatible = "ti,da850-pll0";
 			reg = <0x11000 0x1000>;
@@ -757,6 +766,10 @@
 				 <&async3_clk>;
 			clock-names = "pll0_sysclk2", "pll0_sysclk4", "async3";
 		};
+		pwc1: power-controller@...000 {
+			compatible = "ti,davinci-pm-domains";
+			#power-domain-cells = <0>;
+		};
 		pinconf: pin-controller@...00c {
 			compatible = "ti,da850-pupd";
 			reg = <0x22c00c 0x8>;
-- 
2.16.1

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