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Message-ID: <20180208112540.GA17775@arm.com>
Date: Thu, 8 Feb 2018 11:25:41 +0000
From: Will Deacon <will.deacon@....com>
To: Christoffer Dall <christoffer.dall@...aro.org>
Cc: Suzuki K Poulose <suzuki.poulose@....com>,
linux-arm-kernel@...ts.infradead.org, kvm@...r.kernel.org,
kvmarm@...ts.cs.columbia.edu, marc.zyngier@....com,
linux-kernel@...r.kernel.org, kristina.martsenko@....com,
peter.maydell@...aro.org, pbonzini@...hat.com, rkrcmar@...hat.com,
ard.biesheuvel@...aro.org, mark.rutland@....com,
catalin.marinas@....com
Subject: Re: [PATCH 00/16] kvm: arm64: Support for dynamic IPA size
I can comment on one part here:
On Thu, Feb 08, 2018 at 12:18:44PM +0100, Christoffer Dall wrote:
> Wasn't this also the decision taken for IOMMU page table allocation, and
> why was that the right approach for the IOMMU but not for KVM stage 2
> page tables? Is there room for reuse of the IOMMU page table allocation
> logic in KVM as well?
There were a few reasons we did this for IOMMU page tables:
* Ability to use different page size/VA bits/levels from the CPU
* Ability to support different page table formats (e.g. short descriptor)
* Ability to determine page table attributes at runtime
* Requirement to map/unmap in atomic context
* Ability to cope with non-coherent page table walkers
* Ability to create both stage-1 and stage-2 mappings
* Easier to hook in our own TLB invalidation routines
* Support for lockless concurrent map/unmap within confines of the DMA API
usage
Will
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