[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <da5004d3-c3e8-d9fd-6698-3b12c3ab624a@ti.com>
Date: Thu, 8 Feb 2018 18:17:32 +0530
From: Kishon Vijay Abraham I <kishon@...com>
To: Niklas Cassel <niklas.cassel@...s.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Sekhar Nori <nsekhar@...com>,
Cyrille Pitchen <cyrille.pitchen@...e-electrons.com>,
Niklas Cassel <niklass@...s.com>,
Shawn Lin <shawn.lin@...k-chips.com>,
John Keeping <john@...anate.com>
CC: <linux-pci@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 1/3] PCI: endpoint: Handle 64-bit BARs properly
Hi,
On Thursday 08 February 2018 06:03 PM, Niklas Cassel wrote:
> A 64-bit BAR uses the succeeding BAR for the upper bits, therefore
> we cannot call pci_epc_set_bar() on a BAR that follows a 64-bit BAR.
>
> If pci_epc_set_bar() is called with flag PCI_BASE_ADDRESS_MEM_TYPE_64,
Not related to $patch. But I have a query on when PCI_BASE_ADDRESS_MEM_TYPE_64
should be set. Whether if the size is > 4G or if the address can be mapped
anywhere in the 64-bit PCIe address space or both?
Thanks
Kishon
> it has to be up to the controller driver to write both BAR[x] and BAR[x+1]
> (and BAR_mask[x] and BAR_mask[x+1]).
>
> Signed-off-by: Niklas Cassel <niklas.cassel@...s.com>
> ---
> drivers/pci/endpoint/functions/pci-epf-test.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c
> index 800da09d9005..eef85820f59e 100644
> --- a/drivers/pci/endpoint/functions/pci-epf-test.c
> +++ b/drivers/pci/endpoint/functions/pci-epf-test.c
> @@ -382,6 +382,8 @@ static int pci_epf_test_set_bar(struct pci_epf *epf)
> if (bar == test_reg_bar)
> return ret;
> }
> + if (flags & PCI_BASE_ADDRESS_MEM_TYPE_64)
> + bar++;
> }
>
> return 0;
>
Powered by blists - more mailing lists