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Message-ID: <20180209070026.193879-1-yixun.lan@amlogic.com>
Date:   Fri, 9 Feb 2018 15:00:24 +0800
From:   Yixun Lan <yixun.lan@...ogic.com>
To:     Neil Armstrong <narmstrong@...libre.com>,
        Jerome Brunet <jbrunet@...libre.com>
CC:     Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...eaurora.org>,
        Rob Herring <robh@...nel.org>, Carlo Caione <carlo@...one.org>,
        Kevin Hilman <khilman@...libre.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Yixun Lan <yixun.lan@...ogic.com>,
        Qiufang Dai <qiufang.dai@...ogic.com>,
        Jian Hu <jian.hu@...ogic.com>,
        <linux-amlogic@...ts.infradead.org>, <linux-clk@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>
Subject: [PATCH 0/2] clk: meson-axg: Add AO Cloclk and Reset driver

  This patch try to add AO clock and Reset driver in Amlogic's
Meson-AXG SoC.

  Please note this patchset actually depend on the clock regmap
conversion series [1].

[1] clk: meson: use regmap in clock controllers
 https://lkml.kernel.org/r/20180131180945.18025-1-jbrunet@baylibre.com


Yixun Lan (2):
  dt-bindings: clock: reset: Add AXG AO Clock and Reset Bindings
  clk: meson-axg: Add AO Clock and Reset controller driver

 drivers/clk/meson/Makefile             |   2 +-
 drivers/clk/meson/axg-aoclk.c          | 236 +++++++++++++++++++++++++++++++++
 drivers/clk/meson/axg-aoclk.h          |  25 ++++
 include/dt-bindings/clock/axg-aoclkc.h |  26 ++++
 include/dt-bindings/reset/axg-aoclkc.h |  20 +++
 5 files changed, 308 insertions(+), 1 deletion(-)
 create mode 100644 drivers/clk/meson/axg-aoclk.c
 create mode 100644 drivers/clk/meson/axg-aoclk.h
 create mode 100644 include/dt-bindings/clock/axg-aoclkc.h
 create mode 100644 include/dt-bindings/reset/axg-aoclkc.h

-- 
2.15.1

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