linux-kernel - Re: [PATCH 2/3] Documentation: bindings: add usb3-host-disable and usb3-host-port for Rockchip USB Type-C PHY

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Date:   Mon, 12 Feb 2018 16:29:46 -0600
From:   Rob Herring <robh@...nel.org>
To:     Brian Norris <briannorris@...omium.org>
Cc:     Enric Balletbo Serra <eballetbo@...il.com>,
        Enric Balletbo i Serra <enric.balletbo@...labora.com>,
        Kishon Vijay Abraham I <kishon@...com>,
        Heiko Stuebner <heiko@...ech.de>,
        Doug Anderson <dianders@...omium.org>,
        Chris Zhong <zyw@...k-chips.com>,
        William wu <wulf@...k-chips.com>,
        huang lin <hl@...k-chips.com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        "open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        kernel@...labora.com
Subject: Re: [PATCH 2/3] Documentation: bindings: add usb3-host-disable and
 usb3-host-port for Rockchip USB Type-C PHY

On Mon, Feb 12, 2018 at 3:26 PM, Brian Norris <briannorris@...omium.org> wrote:
> Hi,
>
> On Mon, Feb 12, 2018 at 10:43:41AM -0600, Rob Herring wrote:
>> On Thu, Feb 8, 2018 at 3:23 PM, Enric Balletbo Serra
>> <eballetbo@...il.com> wrote:
>> > 2018-02-08 18:52 GMT+01:00 Rob Herring <robh@...nel.org>:
>> >> On Thu, Feb 8, 2018 at 9:20 AM, Enric Balletbo i Serra
>> >> <enric.balletbo@...labora.com> wrote:
>> >>> --- a/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
>> >>> +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
>> >>> @@ -36,6 +36,12 @@ offset, enable bit, write mask bit.
>> >>>   - rockchip,uphy-dp-sel : the register of type-c phy enable DP function
>> >>>     for type-c phy0, it must be <0x6268 19 19>;
>> >>>     for type-c phy1, it must be <0x6268 3 19>;
>> >>> + - rockchip,usb3-host-disable : the register of type-c phy disable usb3 host
>> >>> +   for type-c phy0, it must be <0x2434 0 16>;
>> >>> +   for type-c phy1, it must be <0x2444 0 16>;
>> >>> + - rockchip,usb3-host-port : the register of type-c phy usb3 port number
>> >>> +   for type-c phy0, it must be <0x2434 12 28>;
>> >>> +   for type-c phy1, it must be <0x2444 12 28>;
>> >>
>> >> When does this list stop? Adding properties for various register
>> >> fields doesn't scale. This information should be in the driver and
>> >> based on the compatible string if necessary.
>> >>
>> >
>> > I see, seams reasonable to me, is this applicable to the new ones only
>> > or I should get rid of all the proprieties like this from the DT
>> > (including the old ones)?
>>
>> We're already kind of stuck with the existing ones. So it depends if
>> people want to phase them out or not.
>
> FWIW, any Chrome{device} using these sort of bindings is perfectly
> capable of handling changed bindings (we ship DTBs with the kernel). But
> that's not typically how mainline covers binding deprecation.

If it's CrOS only that's using these, then it's really up to you all.
I guess it depends if many folks are trying to run mainline on CrOS
devices and don't necessarily keep things in sync.

> If we're going to start recommending not putting these offsets in the
> DT, I'd vote for deprecating them, for consistency. (Otherwise, we'll
> keep running into this same question.) We only documented the RK3399
> ("rockchip,rk3399-typec-phy") binding, so all users should have the same
> offsets. I dunno if/how we pick a time for eventually removing the
> bindings entirely.

Yes, makes sense.

Rob