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Message-Id: <20180212070847.32387-2-joel@jms.id.au>
Date: Mon, 12 Feb 2018 17:38:45 +1030
From: Joel Stanley <joel@....id.au>
To: Lee Jones <lee.jones@...aro.org>, Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>
Cc: Arnd Bergmann <arnd@...db.de>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Andrew Jeffery <andrew@...id.au>,
Cyril Bur <cyrilbur@...il.com>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Ryan Chen <ryan_chen@...eedtech.com>,
Lei YU <mine260309@...il.com>
Subject: [PATCH 1/3] dt-bindings: aspeed-lpc: Document LPC Host Interface Controller
The LPC Host Interface Controller is part of a BMC SoC that is used for
communication with the host.
Signed-off-by: Joel Stanley <joel@....id.au>
---
.../devicetree/bindings/mfd/aspeed-lpc.txt | 40 ++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
index 514d82ced95b..94a31de109c4 100644
--- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
+++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
@@ -109,6 +109,46 @@ lpc: lpc@...89000 {
};
};
+BMC Node Children
+==================
+
+LPC Host Interface Controller
+-------------------
+
+The LPC Host Interface Controller manages functions exposed to the host such as
+LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART
+management and bus snoop configuration.
+
+Required properties:
+
+- compatible: One of:
+ "aspeed,ast2400-lpc-ctrl";
+ "aspeed,ast2500-lpc-ctrl";
+
+- reg: contains offset/length values of the host interface controller
+ memory regions
+
+- clocks: contains a phandle to the syscon node describing the clocks.
+ There should then be one cell representing the clock to use
+
+- memory-region: A phandle to a reserved_memory region to be used for the LPC
+ to AHB mapping
+
+- flash: A phandle to the SPI flash controller containing the flash to
+ be exposed over the LPC to AHB mapping
+
+Example:
+
+lpc-host@80 {
+ lpc_ctrl: lpc-ctrl@0 {
+ compatible = "aspeed,ast2500-lpc-ctrl";
+ reg = <0x0 0x80>;
+ clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
+ memory-region = <&flash_memory>;
+ flash = <&spi>;
+ };
+};
+
Host Node Children
==================
--
2.15.1
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