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Message-ID: <20180213090249.vnjwitt657jabnlt@node.shutemov.name>
Date: Tue, 13 Feb 2018 12:02:49 +0300
From: "Kirill A. Shutemov" <kirill@...temov.name>
To: Andrei Vagin <avagin@...tuozzo.com>
Cc: tip-bot for Jacob Shin <tipbot@...or.com>,
kirill.shutemov@...ux.intel.com, linux-tip-commits@...r.kernel.org,
tglx@...utronix.de, willy@...radead.org, gorcunov@...nvz.org,
bp@...e.de, peterz@...radead.org, torvalds@...ux-foundation.org,
mingo@...nel.org, hpa@...or.com, linux-kernel@...r.kernel.org,
luto@...capital.net
Subject: Re: [tip:x86/boot] x86/boot/compressed/64: Handle 5-level paging
boot if kernel is above 4G
On Tue, Feb 13, 2018 at 12:41:22AM -0800, Andrei Vagin wrote:
> On Tue, Feb 13, 2018 at 11:08:16AM +0300, Kirill A. Shutemov wrote:
> > On Mon, Feb 12, 2018 at 10:51:56PM -0800, Andrei Vagin wrote:
> > > Hi Kirill,
> > >
> > > Something is wrong in this patch.
Could you please check if this makes a difference?
diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S
index 70b30f2bc9e0..99a0e7993252 100644
--- a/arch/x86/boot/compressed/head_64.S
+++ b/arch/x86/boot/compressed/head_64.S
@@ -332,7 +332,7 @@ ENTRY(startup_64)
/* Make sure we have GDT with 32-bit code segment */
leaq gdt(%rip), %rax
- movl %eax, gdt64+2(%rip)
+ movq %rax, gdt64+2(%rip)
lgdt gdt64(%rip)
/*
--
Kirill A. Shutemov
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