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Date: Tue, 13 Feb 2018 07:29:18 -0800 From: tip-bot for Nadav Amit <tipbot@...or.com> To: linux-tip-commits@...r.kernel.org Cc: luto@...nel.org, torvalds@...ux-foundation.org, dave.hansen@...ux.intel.com, nadav.amit@...il.com, linux-kernel@...r.kernel.org, tglx@...utronix.de, peterz@...radead.org, namit@...are.com, mingo@...nel.org, hpa@...or.com Subject: [tip:x86/mm] x86/mm: Align TLB invalidation info Commit-ID: 515ab7c41306aad1f80a980e1936ef635c61570c Gitweb: https://git.kernel.org/tip/515ab7c41306aad1f80a980e1936ef635c61570c Author: Nadav Amit <namit@...are.com> AuthorDate: Wed, 31 Jan 2018 13:19:12 -0800 Committer: Ingo Molnar <mingo@...nel.org> CommitDate: Tue, 13 Feb 2018 15:05:49 +0100 x86/mm: Align TLB invalidation info The TLB invalidation info is allocated on the stack, which might cause it to be unaligned. Since this information may be transferred to different cores for TLB shootdown, this may cause an additional cache line to become shared. While the overhead is likely to be small, the fix is simple. We do not use __cacheline_aligned() since it also defines the section, which is inappropriate for stack variables. Signed-off-by: Nadav Amit <namit@...are.com> Acked-by: Andy Lutomirski <luto@...nel.org> Cc: Dave Hansen <dave.hansen@...ux.intel.com> Cc: Linus Torvalds <torvalds@...ux-foundation.org> Cc: Nadav Amit <nadav.amit@...il.com> Cc: Peter Zijlstra <peterz@...radead.org> Cc: Thomas Gleixner <tglx@...utronix.de> Link: http://lkml.kernel.org/r/20180131211912.52064-1-namit@vmware.com Signed-off-by: Ingo Molnar <mingo@...nel.org> --- arch/x86/mm/tlb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c index 8dcc060..6550d37 100644 --- a/arch/x86/mm/tlb.c +++ b/arch/x86/mm/tlb.c @@ -613,7 +613,7 @@ void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start, { int cpu; - struct flush_tlb_info info = { + struct flush_tlb_info info __aligned(SMP_CACHE_BYTES) = { .mm = mm, };
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