linux-kernel - Re: [PATCH 4.9 43/92] x86/pti: Do not enable PTI on CPUs which are not vulnerable to Meltdown

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Message-ID: <0dfbc8c1-87a4-ae51-2fac-bd4c2f674f83@intel.com>
Date:   Tue, 13 Feb 2018 08:18:17 -0800
From:   Dave Hansen <dave.hansen@...el.com>
To:     Andi Kleen <ak@...ux.intel.com>,
        Arjan van de Ven <arjan@...ux.intel.com>
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Nick Lowe <nick.lowe@...il.com>, linux-kernel@...r.kernel.org,
        stable@...r.kernel.org, David Woodhouse <dwmw@...zon.co.uk>,
        Thomas Gleixner <tglx@...utronix.de>,
        Borislav Petkov <bp@...e.de>, gnomes@...rguk.ukuu.org.uk,
        ashok.raj@...el.com, karahmed@...zon.de,
        torvalds@...ux-foundation.org, peterz@...radead.org,
        Borislav Petkov <bp@...en8.de>, pbonzini@...hat.com,
        tim.c.chen@...ux.intel.com
Subject: Re: [PATCH 4.9 43/92] x86/pti: Do not enable PTI on CPUs which are
 not vulnerable to Meltdown

On 02/13/2018 07:56 AM, Andi Kleen wrote:
> On Tue, Feb 13, 2018 at 07:09:44AM -0800, Arjan van de Ven wrote:
>>> So, any hints on what you think should be the correct fix here?
>> the patch sure looks correct to me, it now has a nice table for CPU IDs
>> including all of AMD (and soon hopefully the existing Intel ones that are not exposed to meltdown)
> I don't think the table is nice, it's a white list that would need
> to be maintained forever.

On Intel, we have that RDCL_NO bit in the ARCH_CAPABILITIES MSR going
forward to show that we are not vulnerable.  So, at least for Intel we
don't need to add new models forever.