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Message-ID: <CAHp75VcCj2PtPgMEb+9ZmO-1t_K16oyY97vn3FbHr=LkGvna-Q@mail.gmail.com>
Date: Tue, 13 Feb 2018 18:52:41 +0200
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Joel Stanley <joel@....id.au>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
linux-serial@...r.kernel.org,
devicetree <devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Tomer Maimon <tomer.maimon@...oton.com>,
Avi Fishman <Avi.Fishman@...oton.com>,
Jeremy Kerr <jk@...abs.org>
Subject: Re: [PATCH] serial: 8250: Add Nuvoton NPCM UART
On Mon, Feb 12, 2018 at 6:48 AM, Joel Stanley <joel@....id.au> wrote:
> The Nuvoton UART is almost compatible with the 8250 driver when probed
> via the 8250_of driver, however it requires some extra configuration
> at startup.
> + [PORT_NPCM] = {
> + .name = "Nuvoton 16550",
> + .fifo_size = 16,
> + .tx_loadsz = 16,
> + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
> + UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
> + .rxtrig_bytes = {1, 4, 8, 14},
> + .flags = UART_CAP_FIFO,
> +
Redundant.
> + },
> + /*
> + * Nuvoton calls the scratch register 'UART_TOR' (timeout
> + * register). Enable it, and set TIOC (timeout interrupt
> + * comparator) to be 0x20 for correct operation.
> + */
> + serial_port_out(port, UART_NPCM_TOR, UART_NPCM_TOIE | 0x20);
> +/* Nuvoton NPCM UARTs have a custom divisor calculation */
> + return DIV_ROUND_CLOSEST(port->uartclk, 16 * baud + 2) - 2;
Is there any link to datasheet?
> +/* Nuvoton UART */
> +#define PORT_NPCM 118
We have gaps there. #40 is perfect place for this one.
> +/* Nuvoton NPCM timeout register */
> +#define UART_NPCM_TOR 7
> +#define UART_NPCM_TOIE BIT(7) /* Timeout Interrupt Enable */
--
With Best Regards,
Andy Shevchenko
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