linux-kernel - Re: [tip:x86/urgent 14/14] drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1690:22: sparse: incorrect type in argument 1 (different base types)

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Message-ID: <1518552164.22495.326.camel@linux.intel.com>
Date:   Tue, 13 Feb 2018 22:02:44 +0200
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     kbuild test robot <fengguang.wu@...el.com>
Cc:     kbuild-all@...org, linux-kernel@...r.kernel.org,
        tipbuild@...or.com, Ingo Molnar <mingo@...nel.org>
Subject: Re: [tip:x86/urgent 14/14]
 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1690:22: sparse: incorrect type
 in argument 1 (different base types)

On Wed, 2018-02-14 at 03:41 +0800, kbuild test robot wrote:
> tree:   https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
> x86/urgent
> head:   0fc8483b698620ea3d8cc6635b54eccc613c23a3
> commit: 0fc8483b698620ea3d8cc6635b54eccc613c23a3 [14/14] x86/io:
> Define readq()/writeq() to use 64-bit type
> reproduce:
>         # apt-get install sparse
>         git checkout 0fc8483b698620ea3d8cc6635b54eccc613c23a3
>         make ARCH=x86_64 allmodconfig
>         make C=1 CF=-D__CHECK_ENDIAN__
> 
> sparse warnings: (new ones prefixed by >>)

> > > drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1690:22: sparse:
> > > incorrect type in argument 1 (different base types) @@ expected
> > > unsigned long long val @@ got nsigned long long val @@
> 
>    drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1690:22: expected
> unsigned long long val
>    drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1690:22: got restricted
> __le64 <noident>
>    drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1691:22: sparse:
> incorrect type in argument 1 (different base types) @@ expected
> unsigned long long val @@ got nsigned long long val @@
>    drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1691:22: expected
> unsigned long long val
>    drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1691:22: got restricted
> __le64 <noident>


> > > drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1231:22: sparse:
> > > incorrect type in argument 1 (different base types) @@ expected
> > > unsigned long long val @@ got nsigned long long val @@
> 
>    drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1231:22: expected
> unsigned long long val
>    drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1231:22: got restricted
> __le64 <noident>
>    drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1232:22: sparse:
> incorrect type in argument 1 (different base types) @@ expected
> unsigned long long val @@ got nsigned long long val @@
>    drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1232:22: expected
> unsigned long long val
>    drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1232:22: got restricted
> __le64 <noident>


Shouldn't above be fixed like this:
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v1.c

+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v1.c

@@ -1687,9 +1687,9 @@ static int hns_roce_v1_post_mbox(struct
ins_roce_dev *hr_dev, u64 in_param,
        roce_set_field(val, ROCEE_MB6_ROCEE_MB_TOKEN_M,
                      ROCEE_MB6_ROCEE_MB_TOKEN_S, token);
 
-       __raw_writeq(cpu_to_le64(in_param), hcr + 0);
-       __raw_writeq(cpu_to_le64(out_param), hcr + 2);
-       __raw_writel(cpu_to_le32(in_modifier), hcr + 4);
+       writeq(in_param, hcr + 0);
+       writeq(out_param, hcr + 2);
+       writel(in_modifier, hcr + 4);
        /* Memory barrier */
        wmb();

(Yeah, patch rather mangled, posted to show the idea)

> > > drivers/scsi/mpt3sas/mpt3sas_base.c:2975:16: sparse: incorrect
> > > type in argument 1 (different base types) @@ expected unsigned
> > > long long val @@ got nsigned long long val @@
> 
>    drivers/scsi/mpt3sas/mpt3sas_base.c:2975:16: expected unsigned long
> long val
>    drivers/scsi/mpt3sas/mpt3sas_base.c:2975:16: got restricted __le64
> <noident>
> > > drivers/scsi/mpt3sas/mpt3sas_base.c:2975:16: sparse: incorrect
> > > type in argument 1 (different base types) @@ expected unsigned
> > > long long val @@ got nsigned long long val @@

My Gosh, it seems cpu_to_le64() there is redundant and no one tested the
code on BE architecture

The entire code there can be changed by using io-64-nonatomic helpers.

-- 
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Intel Finland Oy