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Message-ID: <1518593420.13066.11.camel@linux.intel.com>
Date: Wed, 14 Feb 2018 20:30:20 +1300
From: Kai Huang <kai.huang@...ux.intel.com>
To: Tom Lendacky <thomas.lendacky@....com>,
"Kirill A. Shutemov" <kirill@...temov.name>
Cc: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
Ingo Molnar <mingo@...hat.com>, x86@...nel.org,
Thomas Gleixner <tglx@...utronix.de>,
"H. Peter Anvin" <hpa@...or.com>,
Dave Hansen <dave.hansen@...el.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] x86/mm: Decouple dynamic __PHYSICAL_MASK from AMD SME
On Tue, 2018-02-13 at 22:57 -0600, Tom Lendacky wrote:
> On 2/13/2018 10:21 PM, Kirill A. Shutemov wrote:
> > On Tue, Feb 13, 2018 at 10:10:22PM -0600, Tom Lendacky wrote:
> > > On 2/8/2018 6:55 AM, Kirill A. Shutemov wrote:
> > > > AMD SME claims one bit from physical address to indicate
> > > > whether the
> > > > page is encrypted or not. To achieve that we clear out the bit
> > > > from
> > > > __PHYSICAL_MASK.
> > >
> > > I was actually working on a suggestion by Linus to use one of the
> > > software
> > > page table bits to indicate encryption and translate that to the
> > > hardware
> > > bit when writing the actual page table entry. With that,
> > > __PHYSICAL_MASK
> > > would go back to its original definition.
> >
> > But you would need to mask it on reading of pfn from page table
> > entry,
> > right? I expect it to have more overhead than this one.
>
> When reading back an entry it would translate the hardware bit
> position
> back to the software bit position. The suggestion for changing it
> was
> to make _PAGE_ENC a constant and not tied to the sme_me_mask.
>
> See https://marc.info/?l=linux-kernel&m=151017622615894&w=2
>
> >
> > And software bits are valuable. Do we still have a spare one for
> > this?
>
> I was looking at possibly using bit 57 (_PAGE_BIT_SOFTW5).
But MK-TME supports upto 15 bits (architectually) as keyID. How is this
supposed to work with MK-TME?
Thanks,
-Kai
>
> Thanks,
> Tom
>
> >
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