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Message-id: <7fa753f3-dcea-2fec-de44-f7404851c7eb@samsung.com>
Date: Wed, 14 Feb 2018 15:58:50 +0100
From: Sylwester Nawrocki <s.nawrocki@...sung.com>
To: Chanwoo Choi <cw00.choi@...sung.com>
Cc: linux-clk@...r.kernel.org, sboyd@...eaurora.org,
mturquette@...libre.com, linux-samsung-soc@...r.kernel.org,
linux-kernel@...r.kernel.org, krzk@...nel.org,
b.zolnierkie@...sung.com, m.szyprowski@...sung.com
Subject: Re: [PATCH v2] clk: exynos5433: Extend list of available AUD_PLL
output frequencies
On 02/12/2018 10:46 PM, Chanwoo Choi wrote:
> On 2018년 02월 13일 00:52, Sylwester Nawrocki wrote:
>> Add one more entry to the exynos5433_aud_pll_rates table, this allows
>> to support audio sample rates: 48000, 96000, 192000 Hz with minimum
>> error. The M, P, S, K values re confirmed by the HW team.
>>
>> Signed-off-by: Sylwester Nawrocki <s.nawrocki@...sung.com>
>> ---
>> drivers/clk/samsung/clk-exynos5433.c | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c
>> index ebd18586e325..b08a9028653f 100644
>> --- a/drivers/clk/samsung/clk-exynos5433.c
>> +++ b/drivers/clk/samsung/clk-exynos5433.c
>> @@ -765,6 +765,7 @@ static const struct samsung_pll_rate_table exynos5433_aud_pll_rates[] __initcons
>> PLL_36XX_RATE(294912000U, 98, 1, 3, 19923),
>> PLL_36XX_RATE(288000000U, 96, 1, 3, 0),
>> PLL_36XX_RATE(252000000U, 84, 1, 3, 0),
>> + PLL_36XX_RATE(196608001U, 197, 3, 3, -25690),
>> { /* sentinel */ }
>> };
> Looks good to me.
> Acked-by: Chanwoo Choi <cw00.choi@...sung.com>
Thanks, patch applied to clk/samsung tree.
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