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Message-ID: <3242490.rUUU4MHlpR@avalon>
Date: Thu, 15 Feb 2018 16:04:55 +0200
From: Laurent Pinchart <laurent.pinchart@...asonboard.com>
To: Kieran Bingham <kieran.bingham@...asonboard.com>
Cc: Kieran Bingham <kbingham@...nel.org>,
linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Simon Horman <horms@...ge.net.au>, geert@...der.be,
Kieran Bingham <kieran.bingham+renesas@...asonboard.com>,
David Airlie <airlied@...ux.ie>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Laurent Pinchart <laurent.pinchart+renesas@...asonboard.com>,
"open list:DRM DRIVERS" <dri-devel@...ts.freedesktop.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 3/8] dt-bindings: display: renesas,lvds: Add LVDS binding for D3
Hi Kieran,
On Thursday, 15 February 2018 10:45:33 EET Kieran Bingham wrote:
> On 15/02/18 08:38, Kieran Bingham wrote:
> > From: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>
> >
> > The D3 supports two LVDS channels. Extend the binding to support them.
> >
> > Signed-off-by: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>
> > ---
> >
> > Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> > b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt index
> > 79860f58a7ad..0dcf488b70df 100644
> > --- a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> > +++ b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt
> >
> > @@ -14,6 +14,7 @@ Required properties:
> > - compatible : Shall contain one of
> > - "renesas,lvds-r8a7795" for R8A7795 (R-Car H3) compatible LVDS
> > encoders
> > - "renesas,lvds-r8a7796" for R8A7796 (R-Car M3-W) compatible LVDS
> > encoders
> > + - "renesas,lvds-r8a77995" for R8A77995 (R-Car D3) compatible LVDS
> > encoders
>
> Hi Laurent,
>
> Are we unable to have a generic lvds-gen3 here?
>
> (Although to perhaps answer my own question I see that the D3/E3 have extra
> registers)
>
> Also "lets pretend" that I intentionally separated out the LVDS updates to
> the rcar_lvds_of_table :)
We could for H3 and M3-W, but as you've noticed D3/E3 differ, and so does V3M.
> > - reg: Base address and length for the memory-mapped registers
> > - clocks: A phandle + clock-specifier pair for the functional clock
--
Regards,
Laurent Pinchart
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