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Message-Id: <20180216114948.68868-1-kirill.shutemov@linux.intel.com>
Date:   Fri, 16 Feb 2018 14:49:45 +0300
From:   "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
To:     Ingo Molnar <mingo@...hat.com>, x86@...nel.org,
        Thomas Gleixner <tglx@...utronix.de>,
        "H. Peter Anvin" <hpa@...or.com>
Cc:     Linus Torvalds <torvalds@...ux-foundation.org>,
        Andy Lutomirski <luto@...capital.net>,
        Borislav Petkov <bp@...e.de>, Andi Kleen <ak@...ux.intel.com>,
        linux-mm@...ck.org, linux-kernel@...r.kernel.org,
        "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
Subject: [PATCH 0/3] x86/mm/5lvl: Optimize boot-time switching, allow more Xen modes

This is the last batch of patches that enable boot-time switching
between paging modes.

The first patch allows two more Xen modes to be enabled with
CONFIG_X86_5LEVEL=y. These modes don't support 5-level paging,
but we can use them when boot into 4-level paging mode.

The last two patches optimize switching between paging modes by
using code pathching in all hot paths.

Please review and cosider applying.

Kirill A. Shutemov (3):
  x86/xen: Allow XEN_PV and XEN_PVH to be enabled with X86_5LEVEL
  x86/mm: Redefine some of page table helpers as macros
  x86/mm: Offset boot-time paging mode switching cost

 arch/x86/boot/compressed/misc.h         |  5 +++++
 arch/x86/entry/entry_64.S               | 11 ++---------
 arch/x86/include/asm/paravirt.h         | 23 +++++++++++++----------
 arch/x86/include/asm/pgtable_64_types.h |  5 ++++-
 arch/x86/kernel/head64.c                |  9 +++++++--
 arch/x86/kernel/head_64.S               | 14 +++++++-------
 arch/x86/mm/kasan_init_64.c             |  6 ++++++
 arch/x86/xen/Kconfig                    |  5 -----
 arch/x86/xen/mmu_pv.c                   | 21 +++++++++++++++++++++
 9 files changed, 65 insertions(+), 34 deletions(-)

-- 
2.15.1

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