linux-kernel - [PATCH] x86/microcode: Check microcode revision before updating sibling threads

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-Id: <1518806808-4074-1-git-send-email-ashok.raj@intel.com>
Date:   Fri, 16 Feb 2018 10:46:48 -0800
From:   Ashok Raj <ashok.raj@...el.com>
To:     bp@...e.de
Cc:     ashok.raj@...el.com, X86 ML <x86@...nel.org>,
        LKML <linux-kernel@...r.kernel.org>
Subject: [PATCH] x86/microcode: Check microcode revision before updating sibling threads

After updating microcode on one of the threads in the core, the
thread sibling automatically gets the update since the microcode
resources are shared. Check the ucode revision on the cpu before
performing a ucode update.

Signed-off-by: Ashok Raj <ashok.raj@...el.com>
Cc: X86 ML <x86@...nel.org>
Cc: LKML <linux-kernel@...r.kernel.org>
---
 arch/x86/kernel/cpu/microcode/intel.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
index 09b95a7..5802c2f 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -786,11 +786,21 @@ static enum ucode_state apply_microcode_intel(int cpu)
 
 	uci = ucode_cpu_info + cpu;
 	mc = uci->mc;
+
 	if (!mc) {
 		/* Look for a newer patch in our cache: */
 		mc = find_patch(uci);
 		if (!mc)
 			return UCODE_NFOUND;
+	} else {
+		rev = intel_get_microcode_revision();
+		/*
+		 * Its possible the microcode got udpated
+		 * because its sibling update was done earlier.
+		 * Skip the udpate in that case.
+		 */
+		if (rev == mc->hdr.rev)
+			goto done;
 	}
 
 	/* write microcode via MSR 0x79 */
@@ -813,6 +823,7 @@ static enum ucode_state apply_microcode_intel(int cpu)
 		prev_rev = rev;
 	}
 
+done:
 	c = &cpu_data(cpu);
 
 	uci->cpu_sig.rev = rev;
-- 
2.7.4