[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20180219084944.iqrdzhpl63gdf6wy@flea.lan>
Date: Mon, 19 Feb 2018 09:49:44 +0100
From: Maxime Ripard <maxime.ripard@...tlin.com>
To: Mylène Josserand <mylene.josserand@...tlin.com>
Cc: wens@...e.org, linux@...linux.org.uk, robh+dt@...nel.org,
mark.rutland@....com, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
clabbe.montjoie@...il.com, thomas.petazzoni@...tlin.com,
quentin.schulz@...tlin.com
Subject: Re: [PATCH v3 5/7] arm: dts: sun8i: a83t: Add CCI-400 node
Hi,
On Mon, Feb 19, 2018 at 09:18:35AM +0100, Mylène Josserand wrote:
> + interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
You should align these blocks on the first one in the array.
Thanks!
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
http://bootlin.com
Download attachment "signature.asc" of type "application/pgp-signature" (834 bytes)
Powered by blists - more mailing lists