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Message-ID: <df8c19da-50ae-e608-6961-ac56939a4248@amd.com>
Date: Tue, 20 Feb 2018 09:22:08 -0600
From: Tom Lendacky <thomas.lendacky@....com>
To: David Woodhouse <dwmw2@...radead.org>,
Greg KH <gregkh@...ux-foundation.org>
Cc: arjan@...ux.intel.com, tglx@...utronix.de, karahmed@...zon.de,
x86@...nel.org, linux-kernel@...r.kernel.org,
tim.c.chen@...ux.intel.com, bp@...en8.de, peterz@...radead.org,
pbonzini@...hat.com, ak@...ux.intel.com,
torvalds@...ux-foundation.org, dave.hansen@...el.com,
gnomes@...rguk.ukuu.org.uk
Subject: Re: [PATCH v3 3/6] x86/cpufeatures: Add AMD feature bits for
Speculation Control
On 1/24/2018 4:52 PM, Tom Lendacky wrote:
> On 1/24/2018 11:57 AM, David Woodhouse wrote:
>> On Wed, 2018-01-24 at 18:20 +0100, Greg KH wrote:
>>> On Wed, Jan 24, 2018 at 04:57:02PM +0000, David Woodhouse wrote:
>>>>
>>>> AMD exposes the PRED_CMD/SPEC_CTRL MSRs slightly differently to Intel.
>>>> See http://lkml.kernel.org/r/2b3e25cc-286d-8bd0-aeaf-9ac4aae39de8@amd.com
>>> Oh how fun :(
>>
>> At least they *work* the same :)
>>
>> Although I still haven't seen that doc, Tom...
>
> Working on it...
The CPUID/MSR information is published:
https://developer.amd.com/wp-content/resources/Architecture_Guidelines_Update_Indirect_Branch_Control.pdf
Thanks,
Tom
>
> Thanks,
> Tom
>
>>
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